| Message ID | 20250317145245.910566-3-ariel.dalessandro@collabora.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm/panfrost: Add support for AARCH64_4K page table format | expand |
On 17.03.2025 11:52, Ariel D'Alessandro wrote: > As done in panthor, define and use these GPU_MMU_FEATURES_* macros, > which makes code easier to read and reuse. > > Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@collabora.com> > Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> > Reviewed-by: Steven Price <steven.price@arm.com> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Adrián Larumbe <adrian.larumbe@collabora.com> > --- > drivers/gpu/drm/panfrost/panfrost_mmu.c | 6 ++++-- > drivers/gpu/drm/panfrost/panfrost_regs.h | 2 ++ > 2 files changed, 6 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c > index 9e6f198ef5c1b..294f86b3c25e7 100644 > --- a/drivers/gpu/drm/panfrost/panfrost_mmu.c > +++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c > @@ -615,6 +615,8 @@ static void panfrost_drm_mm_color_adjust(const struct drm_mm_node *node, > > struct panfrost_mmu *panfrost_mmu_ctx_create(struct panfrost_device *pfdev) > { > + u32 va_bits = GPU_MMU_FEATURES_VA_BITS(pfdev->features.mmu_features); > + u32 pa_bits = GPU_MMU_FEATURES_PA_BITS(pfdev->features.mmu_features); > struct panfrost_mmu *mmu; > > mmu = kzalloc(sizeof(*mmu), GFP_KERNEL); > @@ -633,8 +635,8 @@ struct panfrost_mmu *panfrost_mmu_ctx_create(struct panfrost_device *pfdev) > > mmu->pgtbl_cfg = (struct io_pgtable_cfg) { > .pgsize_bitmap = SZ_4K | SZ_2M, > - .ias = FIELD_GET(0xff, pfdev->features.mmu_features), > - .oas = FIELD_GET(0xff00, pfdev->features.mmu_features), > + .ias = va_bits, > + .oas = pa_bits, > .coherent_walk = pfdev->coherent, > .tlb = &mmu_tlb_ops, > .iommu_dev = pfdev->dev, > diff --git a/drivers/gpu/drm/panfrost/panfrost_regs.h b/drivers/gpu/drm/panfrost/panfrost_regs.h > index c7bba476ab3f3..b5f279a19a084 100644 > --- a/drivers/gpu/drm/panfrost/panfrost_regs.h > +++ b/drivers/gpu/drm/panfrost/panfrost_regs.h > @@ -16,6 +16,8 @@ > #define GROUPS_L2_COHERENT BIT(0) /* Cores groups are l2 coherent */ > > #define GPU_MMU_FEATURES 0x014 /* (RO) MMU features */ > +#define GPU_MMU_FEATURES_VA_BITS(x) ((x) & GENMASK(7, 0)) > +#define GPU_MMU_FEATURES_PA_BITS(x) (((x) >> 8) & GENMASK(7, 0)) > #define GPU_AS_PRESENT 0x018 /* (RO) Address space slots present */ > #define GPU_JS_PRESENT 0x01C /* (RO) Job slots present */ > > -- > 2.47.2 Adrian Larumbe
diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c index 9e6f198ef5c1b..294f86b3c25e7 100644 --- a/drivers/gpu/drm/panfrost/panfrost_mmu.c +++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c @@ -615,6 +615,8 @@ static void panfrost_drm_mm_color_adjust(const struct drm_mm_node *node, struct panfrost_mmu *panfrost_mmu_ctx_create(struct panfrost_device *pfdev) { + u32 va_bits = GPU_MMU_FEATURES_VA_BITS(pfdev->features.mmu_features); + u32 pa_bits = GPU_MMU_FEATURES_PA_BITS(pfdev->features.mmu_features); struct panfrost_mmu *mmu; mmu = kzalloc(sizeof(*mmu), GFP_KERNEL); @@ -633,8 +635,8 @@ struct panfrost_mmu *panfrost_mmu_ctx_create(struct panfrost_device *pfdev) mmu->pgtbl_cfg = (struct io_pgtable_cfg) { .pgsize_bitmap = SZ_4K | SZ_2M, - .ias = FIELD_GET(0xff, pfdev->features.mmu_features), - .oas = FIELD_GET(0xff00, pfdev->features.mmu_features), + .ias = va_bits, + .oas = pa_bits, .coherent_walk = pfdev->coherent, .tlb = &mmu_tlb_ops, .iommu_dev = pfdev->dev, diff --git a/drivers/gpu/drm/panfrost/panfrost_regs.h b/drivers/gpu/drm/panfrost/panfrost_regs.h index c7bba476ab3f3..b5f279a19a084 100644 --- a/drivers/gpu/drm/panfrost/panfrost_regs.h +++ b/drivers/gpu/drm/panfrost/panfrost_regs.h @@ -16,6 +16,8 @@ #define GROUPS_L2_COHERENT BIT(0) /* Cores groups are l2 coherent */ #define GPU_MMU_FEATURES 0x014 /* (RO) MMU features */ +#define GPU_MMU_FEATURES_VA_BITS(x) ((x) & GENMASK(7, 0)) +#define GPU_MMU_FEATURES_PA_BITS(x) (((x) >> 8) & GENMASK(7, 0)) #define GPU_AS_PRESENT 0x018 /* (RO) Address space slots present */ #define GPU_JS_PRESENT 0x01C /* (RO) Job slots present */