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Wed, 09 Apr 2025 23:30:17 -0700 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1258.39; Thu, 10 Apr 2025 14:30:14 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1258.39 via Frontend Transport; Thu, 10 Apr 2025 14:30:14 +0800 From: kyrie.wu To: Hans Verkuil , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , kyrie wu , , , , , CC: kyrie.wu Subject: [PATCH v2 04/12] media: mediatek: jpeg: add jpeg smmu sid setting Date: Thu, 10 Apr 2025 14:29:57 +0800 Message-ID: <20250410063006.5313-5-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20250410063006.5313-1-kyrie.wu@mediatek.com> References: <20250410063006.5313-1-kyrie.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250409_233028_703901_FA56C8FD X-CRM114-Status: GOOD ( 16.42 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add a configuration to set jpeg dec & enc smmu sid Signed-off-by: kyrie.wu --- .../platform/mediatek/jpeg/mtk_jpeg_core.c | 34 +++++++++++++++++++ .../platform/mediatek/jpeg/mtk_jpeg_core.h | 19 +++++++++++ .../platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 24 +++++++++++++ .../platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 25 ++++++++++++++ 4 files changed, 102 insertions(+) diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c index 63a6efc8e21a..97117f7babd9 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -1584,6 +1584,18 @@ static irqreturn_t mtk_jpeg_enc_done(struct mtk_jpeg_dev *jpeg) return IRQ_HANDLED; } +static void mtk_jpeg_enc_set_smmu_sid(struct mtk_jpegenc_comp_dev *jpeg) +{ + u32 val, mask; + + val = readl(jpeg->smmu_info.smmu_base); + mask = ~(jpeg->smmu_info.mask << jpeg->smmu_info.shift); + val &= mask; + val |= (jpeg->smmu_info.sid << jpeg->smmu_info.shift); + + writel(val, jpeg->smmu_info.smmu_base); +} + static void mtk_jpegenc_worker(struct work_struct *work) { struct mtk_jpegenc_comp_dev *comp_jpeg[MTK_JPEGENC_HW_MAX]; @@ -1655,6 +1667,10 @@ static void mtk_jpegenc_worker(struct work_struct *work) jpeg_dst_buf->frame_num = ctx->total_frame_num; ctx->total_frame_num++; mtk_jpeg_enc_reset(comp_jpeg[hw_id]->reg_base); + + if (jpeg->variant->support_smmu_flag) + mtk_jpeg_enc_set_smmu_sid(comp_jpeg[hw_id]); + mtk_jpeg_set_enc_dst(ctx, comp_jpeg[hw_id]->reg_base, &dst_buf->vb2_buf); @@ -1679,6 +1695,18 @@ static void mtk_jpegenc_worker(struct work_struct *work) v4l2_m2m_job_finish(jpeg->m2m_dev, ctx->fh.m2m_ctx); } +static void mtk_jpeg_dec_set_smmu_sid(struct mtk_jpegdec_comp_dev *jpeg) +{ + u32 val, mask; + + val = readl(jpeg->smmu_info.smmu_base); + mask = ~(jpeg->smmu_info.mask << jpeg->smmu_info.shift); + val &= mask; + val |= (jpeg->smmu_info.sid << jpeg->smmu_info.shift); + + writel(val, jpeg->smmu_info.smmu_base); +} + static void mtk_jpegdec_worker(struct work_struct *work) { struct mtk_jpeg_ctx *ctx = container_of(work, struct mtk_jpeg_ctx, @@ -1771,6 +1799,10 @@ static void mtk_jpegdec_worker(struct work_struct *work) spin_lock_irqsave(&comp_jpeg[hw_id]->hw_lock, flags); ctx->total_frame_num++; mtk_jpeg_dec_reset(comp_jpeg[hw_id]->reg_base); + + if (jpeg->variant->support_smmu_flag) + mtk_jpeg_dec_set_smmu_sid(comp_jpeg[hw_id]); + mtk_jpeg_dec_set_config(comp_jpeg[hw_id]->reg_base, jpeg->variant->support_34bit, &jpeg_src_buf->dec_param, @@ -1933,6 +1965,7 @@ static struct mtk_jpeg_variant mtk8196_jpegenc_drvdata = { .cap_q_default_fourcc = V4L2_PIX_FMT_JPEG, .multi_core = true, .jpeg_worker = mtk_jpegenc_worker, + .support_smmu_flag = true, }; static const struct mtk_jpeg_variant mtk8195_jpegdec_drvdata = { @@ -1959,6 +1992,7 @@ static const struct mtk_jpeg_variant mtk8196_jpegdec_drvdata = { .cap_q_default_fourcc = V4L2_PIX_FMT_YUV420M, .multi_core = true, .jpeg_worker = mtk_jpegdec_worker, + .support_smmu_flag = true, }; static const struct mtk_jpeg_variant mtk8188_jpegenc_drvdata = { diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h index 8fddc133c46c..17d2b9274469 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h @@ -82,6 +82,7 @@ struct mtk_jpeg_variant { bool multi_core; void (*jpeg_worker)(struct work_struct *work); bool support_34bit; + bool support_smmu_flag; }; struct mtk_jpeg_src_buf { @@ -138,6 +139,20 @@ struct mtk_jpegdec_clk { int clk_num; }; +/** + * struct mtk_smmu_info - Structure used to store smmu information + * @smmu_base: JPEG encode smmu register mapping + * @sid: JPEG encode smmu hw sid + * @shift: JPEG encode smmu hw bit shift + * @mask: JPEG encode smmu hw bit mask + */ +struct mtk_smmu_info { + void __iomem *smmu_base; + unsigned int sid; + unsigned int shift; + unsigned int mask; +}; + /** * struct mtk_jpegenc_comp_dev - JPEG COREX abstraction * @dev: JPEG device @@ -150,6 +165,7 @@ struct mtk_jpegdec_clk { * @hw_param: jpeg encode hw parameters * @hw_state: record hw state * @hw_lock: spinlock protecting the hw device resource + * @smmu_info: SMMU information */ struct mtk_jpegenc_comp_dev { struct device *dev; @@ -163,6 +179,7 @@ struct mtk_jpegenc_comp_dev { enum mtk_jpeg_hw_state hw_state; /* spinlock protecting the hw device resource */ spinlock_t hw_lock; + struct mtk_smmu_info smmu_info; }; /** @@ -177,6 +194,7 @@ struct mtk_jpegenc_comp_dev { * @hw_param: jpeg decode hw parameters * @hw_state: record hw state * @hw_lock: spinlock protecting hw + * @smmu_info: SMMU information */ struct mtk_jpegdec_comp_dev { struct device *dev; @@ -190,6 +208,7 @@ struct mtk_jpegdec_comp_dev { enum mtk_jpeg_hw_state hw_state; /* spinlock protecting the hw device resource */ spinlock_t hw_lock; + struct mtk_smmu_info smmu_info; }; /** diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c index d868e46aaf37..1bc632f54bc2 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c @@ -618,6 +618,29 @@ static int mtk_jpegdec_hw_init_irq(struct mtk_jpegdec_comp_dev *dev) return 0; } +static void mtk_jpegdec_smmu_init(struct mtk_jpegdec_comp_dev *dev) +{ + struct resource *r; + + r = platform_get_resource(dev->plat_dev, IORESOURCE_MEM, 1); + if (!r) { + dev_err(&dev->plat_dev->dev, "get smmu_base failed\n"); + return; + } + + dev->smmu_info.smmu_base = + devm_ioremap(&dev->plat_dev->dev, r->start, + resource_size(r)); + if (IS_ERR(dev->smmu_info.smmu_base)) { + dev_err(&dev->plat_dev->dev, "mmap smmu_base failed(%ld)\n", + PTR_ERR(dev->smmu_info.smmu_base)); + return; + } + + dev->smmu_info.sid = 0x4; + dev->smmu_info.shift = 8; + dev->smmu_info.mask = 0x7; +} static int mtk_jpegdec_hw_probe(struct platform_device *pdev) { struct mtk_jpegdec_clk *jpegdec_clk; @@ -670,6 +693,7 @@ static int mtk_jpegdec_hw_probe(struct platform_device *pdev) master_dev->reg_decbase[i] = dev->reg_base; dev->master_dev = master_dev; + mtk_jpegdec_smmu_init(dev); platform_set_drvdata(pdev, dev); pm_runtime_enable(&pdev->dev); diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c index ca06d4f435cd..db9b67830a72 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c @@ -353,6 +353,30 @@ static int mtk_jpegenc_hw_init_irq(struct mtk_jpegenc_comp_dev *dev) return 0; } +static void mtk_jpegenc_smmu_init(struct mtk_jpegenc_comp_dev *dev) +{ + struct resource *r; + + r = platform_get_resource(dev->plat_dev, IORESOURCE_MEM, 1); + if (!r) { + dev_err(&dev->plat_dev->dev, "get smmu_base failed\n"); + return; + } + + dev->smmu_info.smmu_base = + devm_ioremap(&dev->plat_dev->dev, r->start, + resource_size(r)); + if (IS_ERR(dev->smmu_info.smmu_base)) { + dev_err(&dev->plat_dev->dev, "mmap smmu_base failed(%ld)\n", + PTR_ERR(dev->smmu_info.smmu_base)); + return; + } + + dev->smmu_info.sid = 0x5; + dev->smmu_info.shift = 4; + dev->smmu_info.mask = 0x7; +} + static int mtk_jpegenc_hw_probe(struct platform_device *pdev) { struct mtk_jpegenc_clk *jpegenc_clk; @@ -403,6 +427,7 @@ static int mtk_jpegenc_hw_probe(struct platform_device *pdev) master_dev->reg_encbase[i] = dev->reg_base; dev->master_dev = master_dev; + mtk_jpegenc_smmu_init(dev); platform_set_drvdata(pdev, dev); pm_runtime_enable(&pdev->dev);