@@ -446,6 +446,13 @@ static int mtk_dvfsrc_probe(struct platform_device *pdev)
return 0;
}
+static const struct dvfsrc_bw_constraints dvfsrc_bw_constr_v1 = { 0, 0, 0 };
+static const struct dvfsrc_bw_constraints dvfsrc_bw_constr_v2 = {
+ .max_dram_nom_bw = 255,
+ .max_dram_peak_bw = 255,
+ .max_dram_hrt_bw = 1023,
+};
+
static const struct dvfsrc_opp dvfsrc_opp_mt8183_lp4[] = {
{ 0, 0 }, { 0, 1 }, { 0, 2 }, { 1, 2 },
};
@@ -469,8 +476,6 @@ static const struct dvfsrc_opp_desc dvfsrc_opp_mt8183_desc[] = {
}
};
-static const struct dvfsrc_bw_constraints dvfsrc_bw_constr_mt8183 = { 0, 0, 0 };
-
static const struct dvfsrc_soc_data mt8183_data = {
.opps_desc = dvfsrc_opp_mt8183_desc,
.regs = dvfsrc_mt8183_regs,
@@ -482,7 +487,7 @@ static const struct dvfsrc_soc_data mt8183_data = {
.set_vcore_level = dvfsrc_set_vcore_level_v1,
.wait_for_opp_level = dvfsrc_wait_for_opp_level_v1,
.wait_for_vcore_level = dvfsrc_wait_for_vcore_level_v1,
- .bw_constraints = &dvfsrc_bw_constr_mt8183,
+ .bw_constraints = &dvfsrc_bw_constr_v1,
};
static const struct dvfsrc_opp dvfsrc_opp_mt8195_lp4[] = {
@@ -521,7 +526,7 @@ static const struct dvfsrc_soc_data mt8195_data = {
.set_vscp_level = dvfsrc_set_vscp_level_v2,
.wait_for_opp_level = dvfsrc_wait_for_opp_level_v2,
.wait_for_vcore_level = dvfsrc_wait_for_vcore_level_v1,
- .bw_constraints = &dvfsrc_bw_constr_mt8195,
+ .bw_constraints = &dvfsrc_bw_constr_v2,
};
static const struct of_device_id mtk_dvfsrc_of_match[] = {
Rename the MT8183 and MT8195 bandwidth constraints data structure to, respectively, dvfsrc_bw_constr_v1 and dvfsrc_bw_constr_v2, as the actual constraints are depending on the DVFSRC version rather than on the SoC. While at it, to prepare for adding a new SoC, also move the two structures at the start of the platform data code section. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/soc/mediatek/mtk-dvfsrc.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-)