From patchwork Sun Dec 15 22:09:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Golle X-Patchwork-Id: 13908995 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 52BD8E7716A for ; Sun, 15 Dec 2024 22:10:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: Message-ID:Subject:To:From:Date:Reply-To:Cc:Content-Transfer-Encoding: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=MOhvOTxWYkowP0Jp5tBDXJe0V2hjwUr+6bB4pKN1B+k=; b=If5fUzGZtQ0P1IihFFlLkhO81b Mt9mZXAoqwSBmPT+wY6eIpainiqmElrvguPP5bw1Ck+ULP6vi0zUzB4aTEolglJZB8HfLFkXmggfZ jPVcNCTZLVOmjdKokAkypHGmGTqX2q5WPT0nJnD4Zzm7BpEkM0urH+GniGDtBX2PcXhWDsQ+s4TWz lAlrUJ7X88n2AzuH7MLw040o3hLblmdgTzjhSNq4sa3svN7W8je89pXpu7ApJKVe5waPdp68y/uQn Zhw/35PbbDi95/RLkeYT2gdPc7BXDqkR9jQPpMz16s5OtNZfcCX5g3ITsoxWDLCYOGZQXtsyIEvO2 hHfmnLoA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tMwpE-00000008XeJ-0SI1; Sun, 15 Dec 2024 22:10:56 +0000 Received: from pidgin.makrotopia.org ([2a07:2ec0:3002::65]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tMwoJ-00000008XYt-3eSA; Sun, 15 Dec 2024 22:10:01 +0000 Received: from local by pidgin.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.98) (envelope-from ) id 1tMwo8-000000002oV-1Trq; Sun, 15 Dec 2024 22:09:48 +0000 Date: Sun, 15 Dec 2024 22:09:41 +0000 From: Daniel Golle To: Chun-Kuang Hu , Philipp Zabel , David Airlie , Simona Vetter , Matthias Brugger , AngeloGioacchino Del Regno , Justin Green , Frank Wunderlich , John Crispin , dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org Subject: [PATCH] drm/mediatek: only touch DISP_REG_OVL_PITCH_MSB if AFBC is supported Message-ID: <8c001c8e70d93d64d3ee6bf7dc5078d2783d4e32.1734300345.git.daniel@makrotopia.org> MIME-Version: 1.0 Content-Disposition: inline X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241215_140959_910539_20C140B3 X-CRM114-Status: UNSURE ( 9.48 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Touching DISP_REG_OVL_PITCH_MSB leads to video overlay on MT2701, MT7623N and probably other older SoCs being broken. Only touching it on hardware which actually supports AFBC like it was before commit c410fa9b07c3 ("drm/mediatek: Add AFBC support to Mediatek DRM driver") fixes it. Fixes: c410fa9b07c3 ("drm/mediatek: Add AFBC support to Mediatek DRM driver") Cc: stable@vger.kernel.org Signed-off-by: Daniel Golle --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c index f731d4fbe8b6..321b40a387cd 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -545,7 +545,7 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_PITCH_MSB(idx)); mtk_ddp_write_relaxed(cmdq_pkt, hdr_pitch, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_HDR_PITCH(ovl, idx)); - } else { + } else if (ovl->data->supports_afbc) { mtk_ddp_write_relaxed(cmdq_pkt, overlay_pitch.split_pitch.msb, &ovl->cmdq_reg, ovl->regs, DISP_REG_OVL_PITCH_MSB(idx));