From patchwork Thu Mar 30 15:21:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Golle X-Patchwork-Id: 13194337 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CFB72C6FD1D for ; Thu, 30 Mar 2023 15:21:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:In-Reply-To:Content-Type: MIME-Version:References:Message-ID:Subject:Cc:To:From:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=rRmBDttWg2eWtdiQLjdU9FVBxxgt4ZgzjpeEg4ZfhQE=; b=bw4iQhr5g2Ad84bAmNUi9gVFZQ qZlkc53MM5SEXmf63fVrKb5dEaRMx6CMTfn7O256Nf+DdzGHj92paKPwqZaNTip37yPfTwPWSVoKF OstC2T/gJDVSOk1F4R4hv0dKMmCktu8sIQQ25zkbZDqkWQB0LKhyGHnpLDywdOKaUO/1OSIN7kXKq ThQdLhtsIn+NR5UPN7kpwEGAxKFN9LnYhsCoEh1FvV1D8vxT5Nrnd7u+3KwLO2MmNYS2Z+sh7FZKj 2ibmcID3HGjXTagKR+iwPJMrcBLJ18L3uvm0UnumKCXRMsbNSxSOSxnaiOkeVsq5RDVPY53hnVqvl 8YYMwCHg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1phu5l-004DmG-1p; Thu, 30 Mar 2023 15:21:33 +0000 Received: from fudo.makrotopia.org ([2a07:2ec0:3002::71]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1phu5e-004DjL-1p; Thu, 30 Mar 2023 15:21:32 +0000 Received: from local by fudo.makrotopia.org with esmtpsa (TLS1.3:TLS_AES_256_GCM_SHA384:256) (Exim 4.96) (envelope-from ) id 1phu5d-0006dt-15; Thu, 30 Mar 2023 17:21:25 +0200 Date: Thu, 30 Mar 2023 16:21:21 +0100 From: Daniel Golle To: netdev@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux@armlinux.org.uk, linux-kernel@vger.kernel.org, Andrew Lunn , =?utf-8?b?QXI=?= =?utf-8?b?xLFuw6cgw5xuYWw=?= , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Matthias Brugger , AngeloGioacchino Del Regno , Sean Wang , Landen Chao , DENG Qingfang , Philipp Zabel Cc: Sam Shih , Lorenzo Bianconi , John Crispin , Felix Fietkau Subject: [PATCH net-next 06/15] net: dsa: mt7530: introduce mutex helpers Message-ID: References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230330_082126_759497_42326CB8 X-CRM114-Status: GOOD ( 13.20 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org As the MDIO bus lock only needs to be involved if actually operating on an MDIO-connected switch we will need to skip locking for built-in switches which are accessed via MMIO. Create helper functions which simplify that upcoming change. Reviewed-by: Andrew Lunn Signed-off-by: Daniel Golle --- drivers/net/dsa/mt7530.c | 72 ++++++++++++++++++++-------------------- 1 file changed, 36 insertions(+), 36 deletions(-) diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 803809b430c85..4fed18303673e 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -143,31 +143,40 @@ core_write_mmd_indirect(struct mt7530_priv *priv, int prtad, } static void -core_write(struct mt7530_priv *priv, u32 reg, u32 val) +mt7530_mutex_lock(struct mt7530_priv *priv) { - struct mii_bus *bus = priv->bus; + mutex_lock_nested(&priv->bus->mdio_lock, MDIO_MUTEX_NESTED); +} - mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); +static void +mt7530_mutex_unlock(struct mt7530_priv *priv) +{ + mutex_unlock(&priv->bus->mdio_lock); +} + +static void +core_write(struct mt7530_priv *priv, u32 reg, u32 val) +{ + mt7530_mutex_lock(priv); core_write_mmd_indirect(priv, reg, MDIO_MMD_VEND2, val); - mutex_unlock(&bus->mdio_lock); + mt7530_mutex_unlock(priv); } static void core_rmw(struct mt7530_priv *priv, u32 reg, u32 mask, u32 set) { - struct mii_bus *bus = priv->bus; u32 val; - mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); + mt7530_mutex_lock(priv); val = core_read_mmd_indirect(priv, reg, MDIO_MMD_VEND2); val &= ~mask; val |= set; core_write_mmd_indirect(priv, reg, MDIO_MMD_VEND2, val); - mutex_unlock(&bus->mdio_lock); + mt7530_mutex_unlock(priv); } static void @@ -264,13 +273,11 @@ mt7530_mii_read(struct mt7530_priv *priv, u32 reg) static void mt7530_write(struct mt7530_priv *priv, u32 reg, u32 val) { - struct mii_bus *bus = priv->bus; - - mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); + mt7530_mutex_lock(priv); mt7530_mii_write(priv, reg, val); - mutex_unlock(&bus->mdio_lock); + mt7530_mutex_unlock(priv); } static u32 @@ -282,14 +289,13 @@ _mt7530_unlocked_read(struct mt7530_dummy_poll *p) static u32 _mt7530_read(struct mt7530_dummy_poll *p) { - struct mii_bus *bus = p->priv->bus; u32 val; - mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); + mt7530_mutex_lock(p->priv); val = mt7530_mii_read(p->priv, p->reg); - mutex_unlock(&bus->mdio_lock); + mt7530_mutex_unlock(p->priv); return val; } @@ -307,17 +313,16 @@ static void mt7530_rmw(struct mt7530_priv *priv, u32 reg, u32 mask, u32 set) { - struct mii_bus *bus = priv->bus; u32 val; - mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); + mt7530_mutex_lock(priv); val = mt7530_mii_read(priv, reg); val &= ~mask; val |= set; mt7530_mii_write(priv, reg, val); - mutex_unlock(&bus->mdio_lock); + mt7530_mutex_unlock(priv); } static void @@ -661,14 +666,13 @@ static int mt7531_ind_c45_phy_read(struct mt7530_priv *priv, int port, int devad, int regnum) { - struct mii_bus *bus = priv->bus; struct mt7530_dummy_poll p; u32 reg, val; int ret; INIT_MT7530_DUMMY_POLL(&p, priv, MT7531_PHY_IAC); - mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); + mt7530_mutex_lock(priv); ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val, !(val & MT7531_PHY_ACS_ST), 20, 100000); @@ -701,7 +705,7 @@ mt7531_ind_c45_phy_read(struct mt7530_priv *priv, int port, int devad, ret = val & MT7531_MDIO_RW_DATA_MASK; out: - mutex_unlock(&bus->mdio_lock); + mt7530_mutex_unlock(priv); return ret; } @@ -710,14 +714,13 @@ static int mt7531_ind_c45_phy_write(struct mt7530_priv *priv, int port, int devad, int regnum, u16 data) { - struct mii_bus *bus = priv->bus; struct mt7530_dummy_poll p; u32 val, reg; int ret; INIT_MT7530_DUMMY_POLL(&p, priv, MT7531_PHY_IAC); - mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); + mt7530_mutex_lock(priv); ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val, !(val & MT7531_PHY_ACS_ST), 20, 100000); @@ -749,7 +752,7 @@ mt7531_ind_c45_phy_write(struct mt7530_priv *priv, int port, int devad, } out: - mutex_unlock(&bus->mdio_lock); + mt7530_mutex_unlock(priv); return ret; } @@ -757,14 +760,13 @@ mt7531_ind_c45_phy_write(struct mt7530_priv *priv, int port, int devad, static int mt7531_ind_c22_phy_read(struct mt7530_priv *priv, int port, int regnum) { - struct mii_bus *bus = priv->bus; struct mt7530_dummy_poll p; int ret; u32 val; INIT_MT7530_DUMMY_POLL(&p, priv, MT7531_PHY_IAC); - mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); + mt7530_mutex_lock(priv); ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val, !(val & MT7531_PHY_ACS_ST), 20, 100000); @@ -787,7 +789,7 @@ mt7531_ind_c22_phy_read(struct mt7530_priv *priv, int port, int regnum) ret = val & MT7531_MDIO_RW_DATA_MASK; out: - mutex_unlock(&bus->mdio_lock); + mt7530_mutex_unlock(priv); return ret; } @@ -796,14 +798,13 @@ static int mt7531_ind_c22_phy_write(struct mt7530_priv *priv, int port, int regnum, u16 data) { - struct mii_bus *bus = priv->bus; struct mt7530_dummy_poll p; int ret; u32 reg; INIT_MT7530_DUMMY_POLL(&p, priv, MT7531_PHY_IAC); - mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); + mt7530_mutex_lock(priv); ret = readx_poll_timeout(_mt7530_unlocked_read, &p, reg, !(reg & MT7531_PHY_ACS_ST), 20, 100000); @@ -825,7 +826,7 @@ mt7531_ind_c22_phy_write(struct mt7530_priv *priv, int port, int regnum, } out: - mutex_unlock(&bus->mdio_lock); + mt7530_mutex_unlock(priv); return ret; } @@ -1106,7 +1107,6 @@ static int mt7530_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) { struct mt7530_priv *priv = ds->priv; - struct mii_bus *bus = priv->bus; int length; u32 val; @@ -1117,7 +1117,7 @@ mt7530_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) if (!dsa_is_cpu_port(ds, port)) return 0; - mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); + mt7530_mutex_lock(priv); val = mt7530_mii_read(priv, MT7530_GMACCR); val &= ~MAX_RX_PKT_LEN_MASK; @@ -1138,7 +1138,7 @@ mt7530_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) mt7530_mii_write(priv, MT7530_GMACCR, val); - mutex_unlock(&bus->mdio_lock); + mt7530_mutex_unlock(priv); return 0; } @@ -1939,10 +1939,10 @@ mt7530_irq_thread_fn(int irq, void *dev_id) u32 val; int p; - mutex_lock_nested(&priv->bus->mdio_lock, MDIO_MUTEX_NESTED); + mt7530_mutex_lock(priv); val = mt7530_mii_read(priv, MT7530_SYS_INT_STS); mt7530_mii_write(priv, MT7530_SYS_INT_STS, val); - mutex_unlock(&priv->bus->mdio_lock); + mt7530_mutex_unlock(priv); for (p = 0; p < MT7530_NUM_PHYS; p++) { if (BIT(p) & val) { @@ -1978,7 +1978,7 @@ mt7530_irq_bus_lock(struct irq_data *d) { struct mt7530_priv *priv = irq_data_get_irq_chip_data(d); - mutex_lock_nested(&priv->bus->mdio_lock, MDIO_MUTEX_NESTED); + mt7530_mutex_lock(priv); } static void @@ -1987,7 +1987,7 @@ mt7530_irq_bus_sync_unlock(struct irq_data *d) struct mt7530_priv *priv = irq_data_get_irq_chip_data(d); mt7530_mii_write(priv, MT7530_SYS_INT_EN, priv->irq_enable); - mutex_unlock(&priv->bus->mdio_lock); + mt7530_mutex_unlock(priv); } static struct irq_chip mt7530_irq_chip = {