From patchwork Tue May 26 18:12:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 11571007 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 15362739 for ; Tue, 26 May 2020 18:13:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 06DF72084C for ; Tue, 26 May 2020 18:13:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729200AbgEZSMz (ORCPT ); Tue, 26 May 2020 14:12:55 -0400 Received: from mail.baikalelectronics.com ([87.245.175.226]:59356 "EHLO mail.baikalelectronics.ru" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728285AbgEZSMy (ORCPT ); Tue, 26 May 2020 14:12:54 -0400 Received: from localhost (unknown [127.0.0.1]) by mail.baikalelectronics.ru (Postfix) with ESMTP id 8BD278030869; Tue, 26 May 2020 18:12:51 +0000 (UTC) X-Virus-Scanned: amavisd-new at baikalelectronics.ru Received: from mail.baikalelectronics.ru ([127.0.0.1]) by localhost (mail.baikalelectronics.ru [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id CAN1Ygd7HhR8; Tue, 26 May 2020 21:12:50 +0300 (MSK) From: Serge Semin To: Thomas Bogendoerfer , Greg Kroah-Hartman , Jiri Slaby CC: Serge Semin , Serge Semin , Alexey Malahov , Maxim Kaurkin , Pavel Parkhomenko , Alexey Kolotnikov , Ramil Zaripov , Ekaterina Skachko , Vadim Vlasov , Arnd Bergmann , Andy Shevchenko , Maxime Ripard , Will Deacon , Russell King , , , , Subject: [PATCH v5 0/3] serial: 8250_dw: Fix ref clock usage Date: Tue, 26 May 2020 21:12:23 +0300 Message-ID: <20200526181227.1889-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Greg, Jiri, the merge window is upon us, please review/merge in/whatever the rest of the patches. It might be dangerous if an UART port reference clock rate is suddenly changed. In particular the 8250 port drivers (and AFAICS most of the tty drivers using common clock framework clocks) rely either on the exclusive reference clock utilization or on the ref clock rate being always constant. Needless to say that it turns out not true and if some other service suddenly changes the clock rate behind an UART port driver back it's no good. So the port might not only end up with an invalid uartclk value saved, but may also experience a distorted output/input data since such action will effectively update the programmed baud-clock. We discovered such problem on Baikal-T1 SoC where two DW 8250 ports have got a shared reference clock. Allwinner SoC is equipped with an UART, which clock is derived from the CPU PLL clock source, so the CPU frequency change might be propagated down up to the serial port reference clock. This patchset provides a way to fix the problem to the 8250 serial port controllers and mostly fixes it for the DW 8250-compatible UART. I say mostly because due to not having a facility to pause/stop and resume/ restart on-going transfers we implemented the UART clock rate update procedure executed post factum of the actual reference clock rate change. In addition the patchset includes a few fixes we discovered when were working the issue. First one concerns the maximum baud rate setting used to determine a serial port baud based on the current UART port clock rate. Another one simplifies the ref clock rate setting procedure a bit. This patchset is rebased and tested on the mainline Linux kernel 5.7-rc4: 0e698dfa2822 ("Linux 5.7-rc4") tag: v5.7-rc4 Changelog v3: - Refactor the original patch to adjust the UART port divisor instead of requesting an exclusive ref clock utilization. Changelog v4: - Discard commit b426bf0fb085 ("serial: 8250: Fix max baud limit in generic 8250 port") since Greg has already merged it into the tty-next branch. - Use EXPORT_SYMBOL_GPL() for the serial8250_update_uartclk() method. Changelog v5: - Refactor dw8250_clk_work_cb() function cheking the clk_get_rate() return value for being erroneous and exit if it is. - Don't update p->uartclk in the port startup. It will be updated later in the same procedure at the set_termios() function being invoked by the serial_core anyway. Signed-off-by: Serge Semin Cc: Alexey Malahov Cc: Maxim Kaurkin Cc: Pavel Parkhomenko Cc: Alexey Kolotnikov Cc: Ramil Zaripov Cc: Ekaterina Skachko Cc: Vadim Vlasov Cc: Alexey Kolotnikov Cc: Arnd Bergmann Cc: Andy Shevchenko Cc: Maxime Ripard Cc: Will Deacon Cc: Russell King Cc: linux-mips@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-serial@vger.kernel.org Cc: linux-kernel@vger.kernel.org Serge Semin (3): serial: 8250: Add 8250 port clock update method serial: 8250_dw: Simplify the ref clock rate setting procedure serial: 8250_dw: Fix common clocks usage race condition drivers/tty/serial/8250/8250_dw.c | 116 +++++++++++++++++++++++++--- drivers/tty/serial/8250/8250_port.c | 38 +++++++++ include/linux/serial_8250.h | 2 + 3 files changed, 144 insertions(+), 12 deletions(-)