Message ID | 20200819182645.30132-1-f.fainelli@gmail.com (mailing list archive) |
---|---|
Headers | show |
Series | MIPS: BMIPS: couple of fixes | expand |
On Wed, Aug 19, 2020 at 11:26:43AM -0700, Florian Fainelli wrote: > Hi Thomas, > > These two patches are fixes for the BMIPS5000/5200 CPU cores which were > missing an inclusive physical cache setting from the cpuinfo structure > and we would not be calling CPU specific initialization for secondarey > cores on the second hardware thread. > > Thanks! > > Florian Fainelli (2): > MIPS: mm: BMIPS5000 has inclusive physical caches > MIPS: BMIPS: Also call bmips_cpu_setup() for secondary cores > > arch/mips/kernel/smp-bmips.c | 2 ++ > arch/mips/mm/c-r4k.c | 4 ++++ > 2 files changed, 6 insertions(+) series applied to mips-fixes. Thomas.