[0/3] staging: mt7621-pci: define ralink PCI_IOBASE to avoid manually ranges parsing

Message

Sergio Paracuellos June 13, 2021, 3:56 p.m. UTC

Ralink MIPS platforms do not define PCI_IOBASE. This ends up in
 pci generic apis not working with io resources when calls to function
 'of_pci_range_to_resource' are performed because internall function
 'pci_address_to_pio()' is call and it results in getting 'OF_BAD_ADDR'
 as result. If we define PCI_IOBASE pci generic apis properly works for
 ralink pci controllers. In this particular case, we can remove all
 manually ranges and resource from driver code decresing LOC and being
 more standard.

 In the future, this is also useful for mips pci drivers which are still
 using pci legacy apis. After having PCI_IOBASE defined, only defining 
 'pci_address_to_pio' for PCI_LEGACY might be remaining to also make 
 work 'pci-rt3883', 'pci-mt7620' among others. Sadly I don't have devices
 to test that so I haven't write the code by myself.

 Thanks in advance for your time.

 Best regards,
     Sergio Paracuellos


Sergio Paracuellos (3):
  MIPS: ralink: Define PCI_IOBASE
  staging: mt7621-pci: remove 'mt7621_pci_parse_request_of_pci_ranges'
  staging: mt7621-dts: fix pci address for PCI memory range

 arch/mips/include/asm/mach-ralink/spaces.h |  10 +++
 drivers/staging/mt7621-dts/mt7621.dtsi     |   2 +-
 drivers/staging/mt7621-pci/pci-mt7621.c    | 100 ++++++---------------
 3 files changed, 38 insertions(+), 74 deletions(-)
 create mode 100644 arch/mips/include/asm/mach-ralink/spaces.h