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[v2,0/4] MIPS: Enable ARCH_SUPPORTS_ATOMIC_RMW

Message ID 20240612-mips-llsc-v2-0-a42bd5562bdb@flygoat.com (mailing list archive)
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Series MIPS: Enable ARCH_SUPPORTS_ATOMIC_RMW | expand

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Jiaxun Yang June 12, 2024, 9:53 a.m. UTC 
Hi all,

This series enables ARCH_SUPPORTS_ATOMIC_RMW for MIPS.
The first two patches are for making LLSC availability information
available to Kconfig, and the last two select actual options.

Please review.

v1: https://lore.kernel.org/all/20230519164753.72065-1-jiaxun.yang@flygoat.com/

Thanks
- Jiaxun

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
Jiaxun Yang (4):
      MIPS: Introduce WAR_4KC_LLSC config option
      MIPS: Introduce config options for LLSC availability
      MIPS: Select ARCH_SUPPORTS_ATOMIC_RMW when possible
      MIPS: Select ARCH_HAVE_NMI_SAFE_CMPXCHG when possible

 arch/mips/Kconfig                                  | 28 ++++++++++++++++++++++
 arch/mips/include/asm/cpu-features.h               |  9 ++++++-
 arch/mips/include/asm/cpu.h                        |  1 +
 .../include/asm/mach-ath25/cpu-feature-overrides.h |  6 ++---
 arch/mips/kernel/cpu-probe.c                       |  9 +++++++
 5 files changed, 48 insertions(+), 5 deletions(-)
---
base-commit: 03d44168cbd7fc57d5de56a3730427db758fc7f6
change-id: 20240612-mips-llsc-1f2fb9169c0b

Best regards,