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[93.34.90.105]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-362c7c2dffdsm6277480f8f.35.2024.06.20.09.25.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 20 Jun 2024 09:25:57 -0700 (PDT) From: Christian Marangi To: Hauke Mehrtens , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Thomas Bogendoerfer , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Florian Fainelli , Broadcom internal kernel review list , Christian Marangi , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 0/4] mips: bmips: improve handling of RAC and CBR addr Date: Thu, 20 Jun 2024 17:26:41 +0200 Message-ID: <20240620152649.994-1-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.45.1 Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Hi, this simple series improve handling of RAC and CBR address and try to upstream these simple patch we have in OpenWrt for a while. The first patch fix a straight kernel panic where some Bootloader might enable RAC but misconfigure the CBR address. The current logic only check if RAC is enabled but doesn't verify if the CBR address is usable. The DMA sync function cause a kernel panic for invalid write. (as CBR is 0 or something like 0xa) The second is preparation for making the CBR address configurable in DT. Since this address doesn't change, we can cache it and reference it with a local variable instead of calling the register to access the value. The 4th patch make it configurable with 2 DT property, one to actually set the reg and the other to force set it. The first property is used when CBR is set to 0. The second property is to force it if the Bootloader sets it to something wrong. If the CBR value is not 0 and is not forced with the second property a WARN is printed and the DT value is ignored. The 4th patch enable RAC on BMIPS4350. These has been tested on BCM6358 (HG556a) and BCM6368 (VH4032N) and reported correct functionality. Changes v8: - Drop fix patch (applied to mips-fixes) - Rework CBR cache patch to handle bcm47xx not compiling smp-bmips.c Changes v7: - Add ACK and Reviewed-by tag for dt patch from v5 Changes v6: - Add missing patch that got lost in v5 - Fix missing header for legacy bcm47xx - Fix compilation error with gcc 10.2.1 Changes v5: - Add Ack tags - Improve DT descriptions as suggested by Conor Changes v4: - Fix compilation error with legacy brcm target - Improve property description in DT commit (give CBR meaning and drop reference to linux functions) - Use only __read_mostly as we can't add variable to multiple data sections - In patch 4 use local cbr variable instead of global one. Changes v3: - Drop broken-cbr-reg property - Fix anyOf+const with enum Changes v2: - Prefix brcm vendor in the added property - Drop last patch (cpu switch from DMA sync) - Validate CBR addr from DT to be outside DRAM - Reduce indentation in DT CBR check - Reduce delta and use local variable for CBR where possible - Fix and improve typo and spelling mistake - Use 0xf instead of 0xa for BCM6358 RAC enable Christian Marangi (3): mips: bmips: rework and cache CBR addr handling dt-bindings: mips: brcm: Document brcm,bmips-cbr-reg property mips: bmips: setup: make CBR address configurable Daniel González Cabanelas (1): mips: bmips: enable RAC on BMIPS4350 .../devicetree/bindings/mips/brcm/soc.yaml | 24 +++++++++++++ arch/mips/bcm47xx/prom.c | 3 ++ arch/mips/bcm47xx/setup.c | 8 +++++ arch/mips/bcm63xx/prom.c | 3 ++ arch/mips/bcm63xx/setup.c | 8 +++++ arch/mips/bmips/dma.c | 2 +- arch/mips/bmips/setup.c | 35 +++++++++++++++++-- arch/mips/include/asm/bmips.h | 1 + arch/mips/kernel/smp-bmips.c | 22 ++++++++++-- 9 files changed, 101 insertions(+), 5 deletions(-)