| Message ID | 1594030916-7520-1-git-send-email-chenhc@lemote.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 925a567542c52db771c3659b4477bec03f15ea6b |
| Headers | show |
| Series | MIPS: Loongson64: Adjust IRQ layout | expand |
On Mon, Jul 06, 2020 at 06:21:56PM +0800, Huacai Chen wrote: > Adjust IRQ layout in order to use IRQ resources more efficiently, which > is done by adjusting NR_IRQS and MIPS_CPU_IRQ_BASE. > > Before this patch: > 0~15: ISA/LPC IRQs; > 16~55: Dynamic IRQs; > 56~63: MIPS CPU IRQs; > 64~127: PCH IRQs; > 128~255: Dynamic IRQs. > > After this patch: > 0~15: ISA/LPC IRQs; > 16~23: MIPS CPU IRQs; > 24~87: PCH IRQs; > 88~280: Dynamic IRQs. > > Signed-off-by: Huacai Chen <chenhc@lemote.com> > --- > arch/mips/include/asm/mach-loongson64/irq.h | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) applied to mips-next. Thomas.
diff --git a/arch/mips/include/asm/mach-loongson64/irq.h b/arch/mips/include/asm/mach-loongson64/irq.h index d41dc4a..f5e362f7 100644 --- a/arch/mips/include/asm/mach-loongson64/irq.h +++ b/arch/mips/include/asm/mach-loongson64/irq.h @@ -5,7 +5,11 @@ #include <boot_param.h> /* cpu core interrupt numbers */ -#define MIPS_CPU_IRQ_BASE 56 +#define NR_IRQS_LEGACY 16 +#define NR_MIPS_CPU_IRQS 8 +#define NR_IRQS (NR_IRQS_LEGACY + NR_MIPS_CPU_IRQS + 256) + +#define MIPS_CPU_IRQ_BASE NR_IRQS_LEGACY #include <asm/mach-generic/irq.h>
Adjust IRQ layout in order to use IRQ resources more efficiently, which is done by adjusting NR_IRQS and MIPS_CPU_IRQ_BASE. Before this patch: 0~15: ISA/LPC IRQs; 16~55: Dynamic IRQs; 56~63: MIPS CPU IRQs; 64~127: PCH IRQs; 128~255: Dynamic IRQs. After this patch: 0~15: ISA/LPC IRQs; 16~23: MIPS CPU IRQs; 24~87: PCH IRQs; 88~280: Dynamic IRQs. Signed-off-by: Huacai Chen <chenhc@lemote.com> --- arch/mips/include/asm/mach-loongson64/irq.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)