| Message ID | 1594977035-27899-1-git-send-email-chenhc@lemote.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [V2] MIPS: Loongson64: Reserve legacy MMIO space according to bridge type | expand |
On Fri, Jul 17, 2020 at 05:10:35PM +0800, Huacai Chen wrote: > Define MMIO_LOWER_RESERVED as a constant is incorrect, because different > PCHs (bridge types) have different legacy MMIO space size. According to > the datasheets, the legacy MMIO space size of LS7A is 0x20000, and which > of other PCHs is 0x4000. So it is necessary to reserve legacy MMIO space > according to the bridge type. > > Currently IO_SPACE_LIMIT is defined as 0xffff which is too small for the > LS7A bridge, so increase it to 0xfffff for LOONGSON64. > > Signed-off-by: Huacai Chen <chenhc@lemote.com> > --- > arch/mips/include/asm/io.h | 2 -- > arch/mips/include/asm/mach-generic/spaces.h | 4 ++++ > arch/mips/include/asm/mach-loongson64/spaces.h | 3 +-- > arch/mips/loongson64/init.c | 18 ++++++++++++++---- > 4 files changed, 19 insertions(+), 8 deletions(-) thank you for the changes. With the new patchset from Jiaxun I'm wondering which way you want to go ? Should I apply this patch or should I wait until the new patchset is finalized ? Thomas.
Hi, Thomas, On Tue, Jul 21, 2020 at 4:40 PM Thomas Bogendoerfer <tsbogend@alpha.franken.de> wrote: > > On Fri, Jul 17, 2020 at 05:10:35PM +0800, Huacai Chen wrote: > > Define MMIO_LOWER_RESERVED as a constant is incorrect, because different > > PCHs (bridge types) have different legacy MMIO space size. According to > > the datasheets, the legacy MMIO space size of LS7A is 0x20000, and which > > of other PCHs is 0x4000. So it is necessary to reserve legacy MMIO space > > according to the bridge type. > > > > Currently IO_SPACE_LIMIT is defined as 0xffff which is too small for the > > LS7A bridge, so increase it to 0xfffff for LOONGSON64. > > > > Signed-off-by: Huacai Chen <chenhc@lemote.com> > > --- > > arch/mips/include/asm/io.h | 2 -- > > arch/mips/include/asm/mach-generic/spaces.h | 4 ++++ > > arch/mips/include/asm/mach-loongson64/spaces.h | 3 +-- > > arch/mips/loongson64/init.c | 18 ++++++++++++++---- > > 4 files changed, 19 insertions(+), 8 deletions(-) > > thank you for the changes. With the new patchset from Jiaxun I'm wondering > which way you want to go ? Should I apply this patch or should I wait > until the new patchset is finalized ? I prefer Jiaxun's patches. > > Thomas. > > -- > Crap can work. Given enough thrust pigs will fly, but it's not necessarily a > good idea. [ RFC1925, 2.3 ]
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 346fffd..8ca53f1 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -51,8 +51,6 @@ /* ioswab[bwlq], __mem_ioswab[bwlq] are defined in mangle-port.h */ -#define IO_SPACE_LIMIT 0xffff - /* * On MIPS I/O ports are memory mapped, so we access them using normal * load/store instructions. mips_io_port_base is the virtual address to diff --git a/arch/mips/include/asm/mach-generic/spaces.h b/arch/mips/include/asm/mach-generic/spaces.h index ee5ebe9..aa84b85 100644 --- a/arch/mips/include/asm/mach-generic/spaces.h +++ b/arch/mips/include/asm/mach-generic/spaces.h @@ -103,4 +103,8 @@ #endif #endif +#ifndef IO_SPACE_LIMIT +#define IO_SPACE_LIMIT 0xffff +#endif + #endif /* __ASM_MACH_GENERIC_SPACES_H */ diff --git a/arch/mips/include/asm/mach-loongson64/spaces.h b/arch/mips/include/asm/mach-loongson64/spaces.h index 3de0ac9..0ad02c8 100644 --- a/arch/mips/include/asm/mach-loongson64/spaces.h +++ b/arch/mips/include/asm/mach-loongson64/spaces.h @@ -11,8 +11,7 @@ #define PCI_IOSIZE SZ_16M #define MAP_BASE (PCI_IOBASE + PCI_IOSIZE) -/* Reserved at the start of PCI_IOBASE for legacy drivers */ -#define MMIO_LOWER_RESERVED 0x10000 +#define IO_SPACE_LIMIT 0xfffff #include <asm/mach-generic/spaces.h> #endif diff --git a/arch/mips/loongson64/init.c b/arch/mips/loongson64/init.c index 59ddada..606cdc4 100644 --- a/arch/mips/loongson64/init.c +++ b/arch/mips/loongson64/init.c @@ -65,14 +65,25 @@ void __init prom_free_prom_memory(void) static __init void reserve_pio_range(void) { + /* Reserved at the start of PCI_IOBASE for legacy drivers */ + int mmio_lower_reserved; struct logic_pio_hwaddr *range; range = kzalloc(sizeof(*range), GFP_ATOMIC); if (!range) return; + switch (loongson_sysconf.bridgetype) { + case LS7A: + mmio_lower_reserved = 0x20000; + break; + default: + mmio_lower_reserved = 0x4000; + break; + } + range->fwnode = &of_root->fwnode; - range->size = MMIO_LOWER_RESERVED; + range->size = mmio_lower_reserved; range->hw_start = LOONGSON_PCIIO_BASE; range->flags = LOGIC_PIO_CPU_MMIO; @@ -89,9 +100,8 @@ static __init void reserve_pio_range(void) * i8259 would access I/O space, so mapping must be done here. * Please remove it when all drivers can be managed by logic_pio. */ - ioremap_page_range(PCI_IOBASE, PCI_IOBASE + MMIO_LOWER_RESERVED, - LOONGSON_PCIIO_BASE, - pgprot_device(PAGE_KERNEL)); + ioremap_page_range(PCI_IOBASE, PCI_IOBASE + mmio_lower_reserved, + LOONGSON_PCIIO_BASE, pgprot_device(PAGE_KERNEL)); return; unregister:
Define MMIO_LOWER_RESERVED as a constant is incorrect, because different PCHs (bridge types) have different legacy MMIO space size. According to the datasheets, the legacy MMIO space size of LS7A is 0x20000, and which of other PCHs is 0x4000. So it is necessary to reserve legacy MMIO space according to the bridge type. Currently IO_SPACE_LIMIT is defined as 0xffff which is too small for the LS7A bridge, so increase it to 0xfffff for LOONGSON64. Signed-off-by: Huacai Chen <chenhc@lemote.com> --- arch/mips/include/asm/io.h | 2 -- arch/mips/include/asm/mach-generic/spaces.h | 4 ++++ arch/mips/include/asm/mach-loongson64/spaces.h | 3 +-- arch/mips/loongson64/init.c | 18 ++++++++++++++---- 4 files changed, 19 insertions(+), 8 deletions(-)