diff mbox series

[v2,4/6] pinctrl: Ingenic: Reformat the code.

Message ID 1615476112-113101-5-git-send-email-zhouyanjie@wanyeetech.com (mailing list archive)
State Superseded
Headers show
Series Fix bugs and add support for new Ingenic SoCs. | expand

Commit Message

Zhou Yanjie March 11, 2021, 3:21 p.m. UTC
1.Move the "INGENIC_PIN_GROUP_FUNCS" to the macro definition section.
2.Add tabs before values to align the code in the macro definition section.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
---

Notes:
    v2:
    New patch.

 drivers/pinctrl/pinctrl-ingenic.c | 71 +++++++++++++++++++--------------------
 1 file changed, 35 insertions(+), 36 deletions(-)

Comments

Paul Cercueil March 12, 2021, 1:33 p.m. UTC | #1
Le jeu. 11 mars 2021 à 23:21, 周琰杰 (Zhou Yanjie) 
<zhouyanjie@wanyeetech.com> a écrit :
> 1.Move the "INGENIC_PIN_GROUP_FUNCS" to the macro definition section.
> 2.Add tabs before values to align the code in the macro definition 
> section.
> 
> Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>

Reviewed-by: Paul Cercueil <paul@crapouillou.net>

Cheers,
-Paul

> ---
> 
> Notes:
>     v2:
>     New patch.
> 
>  drivers/pinctrl/pinctrl-ingenic.c | 71 
> +++++++++++++++++++--------------------
>  1 file changed, 35 insertions(+), 36 deletions(-)
> 
> diff --git a/drivers/pinctrl/pinctrl-ingenic.c 
> b/drivers/pinctrl/pinctrl-ingenic.c
> index 607ba0b..ac5ad8a 100644
> --- a/drivers/pinctrl/pinctrl-ingenic.c
> +++ b/drivers/pinctrl/pinctrl-ingenic.c
> @@ -26,37 +26,48 @@
>  #include "pinconf.h"
>  #include "pinmux.h"
> 
> -#define GPIO_PIN	0x00
> -#define GPIO_MSK	0x20
> +#define GPIO_PIN					0x00
> +#define GPIO_MSK					0x20
> 
> -#define JZ4740_GPIO_DATA	0x10
> -#define JZ4740_GPIO_PULL_DIS	0x30
> -#define JZ4740_GPIO_FUNC	0x40
> -#define JZ4740_GPIO_SELECT	0x50
> -#define JZ4740_GPIO_DIR		0x60
> -#define JZ4740_GPIO_TRIG	0x70
> -#define JZ4740_GPIO_FLAG	0x80
> +#define JZ4740_GPIO_DATA			0x10
> +#define JZ4740_GPIO_PULL_DIS		0x30
> +#define JZ4740_GPIO_FUNC			0x40
> +#define JZ4740_GPIO_SELECT			0x50
> +#define JZ4740_GPIO_DIR				0x60
> +#define JZ4740_GPIO_TRIG			0x70
> +#define JZ4740_GPIO_FLAG			0x80
> 
> -#define JZ4770_GPIO_INT		0x10
> -#define JZ4770_GPIO_PAT1	0x30
> -#define JZ4770_GPIO_PAT0	0x40
> -#define JZ4770_GPIO_FLAG	0x50
> -#define JZ4770_GPIO_PEN		0x70
> +#define JZ4770_GPIO_INT				0x10
> +#define JZ4770_GPIO_PAT1			0x30
> +#define JZ4770_GPIO_PAT0			0x40
> +#define JZ4770_GPIO_FLAG			0x50
> +#define JZ4770_GPIO_PEN				0x70
> 
> -#define X1830_GPIO_PEL			0x110
> -#define X1830_GPIO_PEH			0x120
> +#define X1830_GPIO_PEL				0x110
> +#define X1830_GPIO_PEH				0x120
> 
> -#define REG_SET(x) ((x) + 0x4)
> -#define REG_CLEAR(x) ((x) + 0x8)
> +#define REG_SET(x)					((x) + 0x4)
> +#define REG_CLEAR(x)				((x) + 0x8)
> 
> -#define REG_PZ_BASE(x) ((x) * 7)
> -#define REG_PZ_GID2LD(x) ((x) * 7 + 0xf0)
> +#define REG_PZ_BASE(x)				((x) * 7)
> +#define REG_PZ_GID2LD(x)			((x) * 7 + 0xf0)
> 
> -#define GPIO_PULL_DIS	0
> -#define GPIO_PULL_UP	1
> -#define GPIO_PULL_DOWN	2
> +#define GPIO_PULL_DIS				0
> +#define GPIO_PULL_UP				1
> +#define GPIO_PULL_DOWN				2
> 
> -#define PINS_PER_GPIO_CHIP 32
> +#define PINS_PER_GPIO_CHIP			32
> +
> +#define INGENIC_PIN_GROUP_FUNCS(name, id, funcs)		\
> +	{						\
> +		name,					\
> +		id##_pins,				\
> +		ARRAY_SIZE(id##_pins),			\
> +		funcs,					\
> +	}
> +
> +#define INGENIC_PIN_GROUP(name, id, func)		\
> +	INGENIC_PIN_GROUP_FUNCS(name, id, (void *)(func))
> 
>  enum jz_version {
>  	ID_JZ4740,
> @@ -134,18 +145,6 @@ static int jz4740_pwm_pwm5_pins[] = { 0x7c, };
>  static int jz4740_pwm_pwm6_pins[] = { 0x7e, };
>  static int jz4740_pwm_pwm7_pins[] = { 0x7f, };
> 
> -
> -#define INGENIC_PIN_GROUP_FUNCS(name, id, funcs)		\
> -	{						\
> -		name,					\
> -		id##_pins,				\
> -		ARRAY_SIZE(id##_pins),			\
> -		funcs,					\
> -	}
> -
> -#define INGENIC_PIN_GROUP(name, id, func)		\
> -	INGENIC_PIN_GROUP_FUNCS(name, id, (void *)(func))
> -
>  static const struct group_desc jz4740_groups[] = {
>  	INGENIC_PIN_GROUP("mmc-1bit", jz4740_mmc_1bit, 0),
>  	INGENIC_PIN_GROUP("mmc-4bit", jz4740_mmc_4bit, 0),
> --
> 2.7.4
>
diff mbox series

Patch

diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c
index 607ba0b..ac5ad8a 100644
--- a/drivers/pinctrl/pinctrl-ingenic.c
+++ b/drivers/pinctrl/pinctrl-ingenic.c
@@ -26,37 +26,48 @@ 
 #include "pinconf.h"
 #include "pinmux.h"
 
-#define GPIO_PIN	0x00
-#define GPIO_MSK	0x20
+#define GPIO_PIN					0x00
+#define GPIO_MSK					0x20
 
-#define JZ4740_GPIO_DATA	0x10
-#define JZ4740_GPIO_PULL_DIS	0x30
-#define JZ4740_GPIO_FUNC	0x40
-#define JZ4740_GPIO_SELECT	0x50
-#define JZ4740_GPIO_DIR		0x60
-#define JZ4740_GPIO_TRIG	0x70
-#define JZ4740_GPIO_FLAG	0x80
+#define JZ4740_GPIO_DATA			0x10
+#define JZ4740_GPIO_PULL_DIS		0x30
+#define JZ4740_GPIO_FUNC			0x40
+#define JZ4740_GPIO_SELECT			0x50
+#define JZ4740_GPIO_DIR				0x60
+#define JZ4740_GPIO_TRIG			0x70
+#define JZ4740_GPIO_FLAG			0x80
 
-#define JZ4770_GPIO_INT		0x10
-#define JZ4770_GPIO_PAT1	0x30
-#define JZ4770_GPIO_PAT0	0x40
-#define JZ4770_GPIO_FLAG	0x50
-#define JZ4770_GPIO_PEN		0x70
+#define JZ4770_GPIO_INT				0x10
+#define JZ4770_GPIO_PAT1			0x30
+#define JZ4770_GPIO_PAT0			0x40
+#define JZ4770_GPIO_FLAG			0x50
+#define JZ4770_GPIO_PEN				0x70
 
-#define X1830_GPIO_PEL			0x110
-#define X1830_GPIO_PEH			0x120
+#define X1830_GPIO_PEL				0x110
+#define X1830_GPIO_PEH				0x120
 
-#define REG_SET(x) ((x) + 0x4)
-#define REG_CLEAR(x) ((x) + 0x8)
+#define REG_SET(x)					((x) + 0x4)
+#define REG_CLEAR(x)				((x) + 0x8)
 
-#define REG_PZ_BASE(x) ((x) * 7)
-#define REG_PZ_GID2LD(x) ((x) * 7 + 0xf0)
+#define REG_PZ_BASE(x)				((x) * 7)
+#define REG_PZ_GID2LD(x)			((x) * 7 + 0xf0)
 
-#define GPIO_PULL_DIS	0
-#define GPIO_PULL_UP	1
-#define GPIO_PULL_DOWN	2
+#define GPIO_PULL_DIS				0
+#define GPIO_PULL_UP				1
+#define GPIO_PULL_DOWN				2
 
-#define PINS_PER_GPIO_CHIP 32
+#define PINS_PER_GPIO_CHIP			32
+
+#define INGENIC_PIN_GROUP_FUNCS(name, id, funcs)		\
+	{						\
+		name,					\
+		id##_pins,				\
+		ARRAY_SIZE(id##_pins),			\
+		funcs,					\
+	}
+
+#define INGENIC_PIN_GROUP(name, id, func)		\
+	INGENIC_PIN_GROUP_FUNCS(name, id, (void *)(func))
 
 enum jz_version {
 	ID_JZ4740,
@@ -134,18 +145,6 @@  static int jz4740_pwm_pwm5_pins[] = { 0x7c, };
 static int jz4740_pwm_pwm6_pins[] = { 0x7e, };
 static int jz4740_pwm_pwm7_pins[] = { 0x7f, };
 
-
-#define INGENIC_PIN_GROUP_FUNCS(name, id, funcs)		\
-	{						\
-		name,					\
-		id##_pins,				\
-		ARRAY_SIZE(id##_pins),			\
-		funcs,					\
-	}
-
-#define INGENIC_PIN_GROUP(name, id, func)		\
-	INGENIC_PIN_GROUP_FUNCS(name, id, (void *)(func))
-
 static const struct group_desc jz4740_groups[] = {
 	INGENIC_PIN_GROUP("mmc-1bit", jz4740_mmc_1bit, 0),
 	INGENIC_PIN_GROUP("mmc-4bit", jz4740_mmc_4bit, 0),