| Message ID | 1617701112-14007-1-git-send-email-yangtiezhu@loongson.cn (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 5e65c52ec716af6e8f51dacdaeb4a4d872249af1 |
| Headers | show |
| Series | [RFC] MIPS: Loongson64: Use _CACHE_UNCACHED instead of _CACHE_UNCACHED_ACCELERATED | expand |
On Tue, Apr 06, 2021 at 05:25:12PM +0800, Tiezhu Yang wrote: > Loongson64 processors have a writecombine issue that maybe failed to > write back framebuffer used with ATI Radeon or AMD GPU at times, after > commit 8a08e50cee66 ("drm: Permit video-buffers writecombine mapping > for MIPS"), there exists some errors such as blurred screen and lockup, > and so on. > > [ 60.958721] radeon 0000:03:00.0: ring 0 stalled for more than 10079msec > [ 60.965315] radeon 0000:03:00.0: GPU lockup (current fence id 0x0000000000000112 last fence id 0x000000000000011d on ring 0) > [ 60.976525] radeon 0000:03:00.0: ring 3 stalled for more than 10086msec > [ 60.983156] radeon 0000:03:00.0: GPU lockup (current fence id 0x0000000000000374 last fence id 0x00000000000003a8 on ring 3) > > As discussed earlier [1], it might be better to disable writecombine > on the CPU detection side because the root cause is unknown now. > > Actually, this patch is a temporary solution to just make it work well, > it is not a proper and final solution, I hope someone will have a better > solution to fix this issue in the future. > > [1] https://lore.kernel.org/patchwork/patch/1285542/ > > Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> > --- > > Hi Thomas, > > If you are OK with this change, could you please apply it > to mips-next? Then, no need to do this change manually every > time when update the mainline kernel. looks good to me, applied to mips-next. Thomas.
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index b718920..0ef240a 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1752,7 +1752,6 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) set_isa(c, MIPS_CPU_ISA_M64R2); break; } - c->writecombine = _CACHE_UNCACHED_ACCELERATED; c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2); break; @@ -1782,7 +1781,6 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) * register, we correct it here. */ c->options |= MIPS_CPU_FTLB | MIPS_CPU_TLBINV | MIPS_CPU_LDPTE; - c->writecombine = _CACHE_UNCACHED_ACCELERATED; c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM | MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2); c->ases &= ~MIPS_ASE_VZ; /* VZ of Loongson-3A2000/3000 is incomplete */ @@ -1793,7 +1791,6 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) set_elf_platform(cpu, "loongson3a"); set_isa(c, MIPS_CPU_ISA_M64R2); decode_cpucfg(c); - c->writecombine = _CACHE_UNCACHED_ACCELERATED; break; default: panic("Unknown Loongson Processor ID!");
Loongson64 processors have a writecombine issue that maybe failed to write back framebuffer used with ATI Radeon or AMD GPU at times, after commit 8a08e50cee66 ("drm: Permit video-buffers writecombine mapping for MIPS"), there exists some errors such as blurred screen and lockup, and so on. [ 60.958721] radeon 0000:03:00.0: ring 0 stalled for more than 10079msec [ 60.965315] radeon 0000:03:00.0: GPU lockup (current fence id 0x0000000000000112 last fence id 0x000000000000011d on ring 0) [ 60.976525] radeon 0000:03:00.0: ring 3 stalled for more than 10086msec [ 60.983156] radeon 0000:03:00.0: GPU lockup (current fence id 0x0000000000000374 last fence id 0x00000000000003a8 on ring 3) As discussed earlier [1], it might be better to disable writecombine on the CPU detection side because the root cause is unknown now. Actually, this patch is a temporary solution to just make it work well, it is not a proper and final solution, I hope someone will have a better solution to fix this issue in the future. [1] https://lore.kernel.org/patchwork/patch/1285542/ Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> --- Hi Thomas, If you are OK with this change, could you please apply it to mips-next? Then, no need to do this change manually every time when update the mainline kernel. arch/mips/kernel/cpu-probe.c | 3 --- 1 file changed, 3 deletions(-)