[10/14] MIPS: mm: Un-inline get_new_mmu_context

Commit Message

Paul Burton Feb. 2, 2019, 1:43 a.m. UTC

In preparation for adding MMID support to get_new_mmu_context() which
will increase the size of the function somewhat, move it from
asm/mmu_context.h into a C file.

Signed-off-by: Paul Burton <[e-mail]>
---

 arch/mips/include/asm/mmu_context.h | 20 +-------------------
 arch/mips/mm/Makefile               |  1 +
 arch/mips/mm/context.c              | 19 +++++++++++++++++++
 3 files changed, 21 insertions(+), 19 deletions(-)
 create mode 100644 arch/mips/mm/context.c

Patch

diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
index 752ebda82cdd..cb39a39d02f6 100644
--- a/arch/mips/include/asm/mmu_context.h
+++ b/arch/mips/include/asm/mmu_context.h
@@ -97,25 +97,7 @@  static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
 {
 }
 
-
-/* Normal, classic MIPS get_new_mmu_context */
-static inline void
-get_new_mmu_context(struct mm_struct *mm)
-{
-	unsigned int cpu;
-	u64 asid;
-
-	cpu = smp_processor_id();
-	asid = asid_cache(cpu);
-
-	if (!((asid += cpu_asid_inc()) & cpu_asid_mask(&cpu_data[cpu]))) {
-		if (cpu_has_vtag_icache)
-			flush_icache_all();
-		local_flush_tlb_all();	/* start new asid cycle */
-	}
-
-	cpu_context(cpu, mm) = asid_cache(cpu) = asid;
-}
+extern void get_new_mmu_context(struct mm_struct *mm);
 
 /*
  * Initialize the context related info for a new mm_struct
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile
index 25d492736848..f34d7ff5eb60 100644
--- a/arch/mips/mm/Makefile
+++ b/arch/mips/mm/Makefile
@@ -4,6 +4,7 @@ 
 #
 
 obj-y				+= cache.o
+obj-y				+= context.o
 obj-y				+= extable.o
 obj-y				+= fault.o
 obj-y				+= gup.o
diff --git a/arch/mips/mm/context.c b/arch/mips/mm/context.c
new file mode 100644
index 000000000000..b5af471006f0
--- /dev/null
+++ b/arch/mips/mm/context.c
@@ -0,0 +1,19 @@ 
+// SPDX-License-Identifier: GPL-2.0
+#include <linux/mmu_context.h>
+
+void get_new_mmu_context(struct mm_struct *mm)
+{
+	unsigned int cpu;
+	u64 asid;
+
+	cpu = smp_processor_id();
+	asid = asid_cache(cpu);
+
+	if (!((asid += cpu_asid_inc()) & cpu_asid_mask(&cpu_data[cpu]))) {
+		if (cpu_has_vtag_icache)
+			flush_icache_all();
+		local_flush_tlb_all();	/* start new asid cycle */
+	}
+
+	cpu_context(cpu, mm) = asid_cache(cpu) = asid;
+}