| Message ID | 20190330055038.18958-2-sergio.paracuellos@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | MT7621 PCIe PHY | expand |
On Sat, 30 Mar 2019 06:50:37 +0100, Sergio Paracuellos wrote: > Add bindings to describe Mediatek MT7621 PCIe PHY. > > Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> > --- > .../bindings/phy/mediatek,mt7621-pci-phy.txt | 28 +++++++++++++++++++ > 1 file changed, 28 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.txt > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.txt b/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.txt new file mode 100644 index 000000000000..a369d715378b --- /dev/null +++ b/Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.txt @@ -0,0 +1,28 @@ +Mediatek Mt7621 PCIe PHY + +Required properties: +- compatible: must be "mediatek,mt7621-pci-phy" +- reg: base address and length of the PCIe PHY block +- #phy-cells: must be <1> for pcie0_phy and for pcie1_phy. + +Example: + pcie0_phy: pcie-phy@1e149000 { + compatible = "mediatek,mt7621-pci-phy"; + reg = <0x1e149000 0x0700>; + #phy-cells = <1>; + }; + + pcie1_phy: pcie-phy@1e14a000 { + compatible = "mediatek,mt7621-pci-phy"; + reg = <0x1e14a000 0x0700>; + #phy-cells = <1>; + }; + + /* users of the PCIe phy */ + + pcie: pcie@1e140000 { + ... + ... + phys = <&pcie0_phy 0>, <&pcie0_phy 1>, <&pcie1_phy 0>; + phy-names = "pcie-phy0", "pcie-phy1", "pcie-phy2"; + };
Add bindings to describe Mediatek MT7621 PCIe PHY. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> --- .../bindings/phy/mediatek,mt7621-pci-phy.txt | 28 +++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/mediatek,mt7621-pci-phy.txt