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+* Clock bindings for Ralink/Mediatek MIPS based SoCs
+
+Required properties:
+ - compatible: must be "ralink,rt2880-clock" and
+ one of the following, to identify SoC series
+ "mediatek,mt7620-clock" for MT7620
+ "mediatek,mt7628-clock" for MT7628/MT7688
+ "mediatek,mt7621-clock" for MT7621
+ - #clock-cells: must be 1
+ - ralink,sysctl: a phandle to a ralink syscon register region
+
+
+Example:
+
+clkctrl: clkctrl {
+ compatible = "mediatek,mt7620-clock", "ralink,rt2880-clock";
+ #clock-cells = <1>;
+
+ ralink,sysctl = <&sysc>;
+};
Signed-off-by: NOGUCHI Hiroshi <drvlabo@gmail.com> --- .../bindings/clock/ralink,rt2880-clock.txt | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/ralink,rt2880-clock.txt