diff mbox series

[v2] MIPS: Treat Loongson Extensions as ASEs

Message ID 20190529084259.8511-1-jiaxun.yang@flygoat.com (mailing list archive)
State Mainlined
Commit d2f965549006acb865c4638f1f030ebcefdc71f6
Headers show
Series [v2] MIPS: Treat Loongson Extensions as ASEs | expand

Commit Message

Jiaxun Yang May 29, 2019, 8:42 a.m. UTC 
Recently, binutils had split Loongson-3 Extensions into four ASEs:
MMI, CAM, EXT, EXT2. This patch do the samething in kernel and expose
them in cpuinfo so applications can probe supported ASEs at runtime.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Yunqiang Su <ysu@wavecomp.com>
Cc: stable@vger.kernel.org # v4.14+
---
 arch/mips/include/asm/cpu-features.h | 16 ++++++++++++++++
 arch/mips/include/asm/cpu.h          |  4 ++++
 arch/mips/kernel/cpu-probe.c         |  6 ++++++
 arch/mips/kernel/proc.c              |  4 ++++
 4 files changed, 30 insertions(+)

Comments

Philippe Mathieu-Daudé May 29, 2019, 2:27 p.m. UTC | #1 
Hi Jiaxun,

On 5/29/19 10:42 AM, Jiaxun Yang wrote:
> Recently, binutils had split Loongson-3 Extensions into four ASEs:
> MMI, CAM, EXT, EXT2. This patch do the samething in kernel and expose
> them in cpuinfo so applications can probe supported ASEs at runtime.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> Cc: Huacai Chen <chenhc@lemote.com>
> Cc: Yunqiang Su <ysu@wavecomp.com>
> Cc: stable@vger.kernel.org # v4.14+
> ---
>  arch/mips/include/asm/cpu-features.h | 16 ++++++++++++++++
>  arch/mips/include/asm/cpu.h          |  4 ++++
>  arch/mips/kernel/cpu-probe.c         |  6 ++++++
>  arch/mips/kernel/proc.c              |  4 ++++
>  4 files changed, 30 insertions(+)
> 
> diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
> index 6998a9796499..4e2bea8875f5 100644
> --- a/arch/mips/include/asm/cpu-features.h
> +++ b/arch/mips/include/asm/cpu-features.h
> @@ -397,6 +397,22 @@
>  #define cpu_has_dsp3		__ase(MIPS_ASE_DSP3)
>  #endif
>  
> +#ifndef cpu_has_loongson_mmi
> +#define cpu_has_loongson_mmi		__ase(MIPS_ASE_LOONGSON_MMI)
> +#endif
> +
> +#ifndef cpu_has_loongson_cam
> +#define cpu_has_loongson_cam		__ase(MIPS_ASE_LOONGSON_CAM)
> +#endif
> +
> +#ifndef cpu_has_loongson_ext
> +#define cpu_has_loongson_ext		__ase(MIPS_ASE_LOONGSON_EXT)
> +#endif
> +
> +#ifndef cpu_has_loongson_ext2
> +#define cpu_has_loongson_ext2		__ase(MIPS_ASE_LOONGSON_EXT2)
> +#endif
> +
>  #ifndef cpu_has_mipsmt
>  #define cpu_has_mipsmt		__isa_lt_and_ase(6, MIPS_ASE_MIPSMT)
>  #endif
> diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
> index 6ad7d3cabd91..cc15670ef43a 100644
> --- a/arch/mips/include/asm/cpu.h
> +++ b/arch/mips/include/asm/cpu.h
> @@ -438,5 +438,9 @@ enum cpu_type_enum {
>  #define MIPS_ASE_MSA		0x00000100 /* MIPS SIMD Architecture */
>  #define MIPS_ASE_DSP3		0x00000200 /* Signal Processing ASE Rev 3*/
>  #define MIPS_ASE_MIPS16E2	0x00000400 /* MIPS16e2 */
> +#define MIPS_ASE_LOONGSON_MMI	0x00000800 /* Loongson MultiMedia extensions Instructions */
> +#define MIPS_ASE_LOONGSON_CAM	0x00001000 /* Loongson CAM */
> +#define MIPS_ASE_LOONGSON_EXT	0x00002000 /* Loongson EXTensions */
> +#define MIPS_ASE_LOONGSON_EXT2	0x00004000 /* Loongson EXTensions R2 */
>  
>  #endif /* _ASM_CPU_H */
> diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
> index 6126b77d5a62..f349be1cf5b8 100644
> --- a/arch/mips/kernel/cpu-probe.c
> +++ b/arch/mips/kernel/cpu-probe.c
> @@ -1577,6 +1577,8 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
>  			__cpu_name[cpu] = "ICT Loongson-3";
>  			set_elf_platform(cpu, "loongson3a");
>  			set_isa(c, MIPS_CPU_ISA_M64R1);
> +			c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
> +				MIPS_ASE_LOONGSON_EXT);
>  			break;
>  		case PRID_REV_LOONGSON3B_R1:
>  		case PRID_REV_LOONGSON3B_R2:
> @@ -1584,6 +1586,8 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
>  			__cpu_name[cpu] = "ICT Loongson-3";
>  			set_elf_platform(cpu, "loongson3b");
>  			set_isa(c, MIPS_CPU_ISA_M64R1);
> +			c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
> +				MIPS_ASE_LOONGSON_EXT);
>  			break;
>  		}
>  
> @@ -1950,6 +1954,8 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
>  		decode_configs(c);
>  		c->options |= MIPS_CPU_FTLB | MIPS_CPU_TLBINV | MIPS_CPU_LDPTE;
>  		c->writecombine = _CACHE_UNCACHED_ACCELERATED;
> +		c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
> +			MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2);

You announce the Loongson 2E/2F as supporting the EXTensions R2 ASE, are
you sure this is correct?

Regards,

Phil.

>  		break;
>  	default:
>  		panic("Unknown Loongson Processor ID!");
> diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
> index b2de408a259e..f8d36710cd58 100644
> --- a/arch/mips/kernel/proc.c
> +++ b/arch/mips/kernel/proc.c
> @@ -124,6 +124,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
>  	if (cpu_has_eva)	seq_printf(m, "%s", " eva");
>  	if (cpu_has_htw)	seq_printf(m, "%s", " htw");
>  	if (cpu_has_xpa)	seq_printf(m, "%s", " xpa");
> +	if (cpu_has_loongson_mmi)	seq_printf(m, "%s", " loongson-mmi");
> +	if (cpu_has_loongson_cam)	seq_printf(m, "%s", " loongson-cam");
> +	if (cpu_has_loongson_ext)	seq_printf(m, "%s", " loongson-ext");
> +	if (cpu_has_loongson_ext2)	seq_printf(m, "%s", " loongson-ext2");
>  	seq_printf(m, "\n");
>  
>  	if (cpu_has_mmips) {
>
Jiaxun Yang May 30, 2019, 3:44 a.m. UTC | #2 
On 2019/5/29 下午10:27, Philippe Mathieu-Daudé wrote:
> Hi Jiaxun,
>
> On 5/29/19 10:42 AM, Jiaxun Yang wrote:
>>   
>> @@ -1950,6 +1954,8 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
>>   		decode_configs(c);
>>   		c->options |= MIPS_CPU_FTLB | MIPS_CPU_TLBINV | MIPS_CPU_LDPTE;
>>   		c->writecombine = _CACHE_UNCACHED_ACCELERATED;
>> +		c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
>> +			MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2);
> You announce the Loongson 2E/2F as supporting the EXTensions R2 ASE, are
> you sure this is correct?
Hi Phil

Only Loongson 3A R2/R3 support EXT2. In this case, cpu_probe_loongson() 
only set the cap for Loongson 3A R2/R3, since Loongson-2E/F have legacy 
format of PRID and it's handeld by cpu_probe_legacy().

Thanks.

---

Jiaxun Yang
Paul Burton Aug. 26, 2019, 11:05 a.m. UTC | #3 
Hello,

Jiaxun Yang wrote:
> Recently, binutils had split Loongson-3 Extensions into four ASEs:
> MMI, CAM, EXT, EXT2. This patch do the samething in kernel and expose
> them in cpuinfo so applications can probe supported ASEs at runtime.

Applied to mips-next.

> commit d2f965549006
> https://git.kernel.org/mips/c/d2f965549006
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> Signed-off-by: Paul Burton <paul.burton@mips.com>

Thanks,
    Paul

[ This message was auto-generated; if you believe anything is incorrect
  then please email paul.burton@mips.com to report it. ]
diff mbox series

Patch

diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 6998a9796499..4e2bea8875f5 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -397,6 +397,22 @@ 
 #define cpu_has_dsp3		__ase(MIPS_ASE_DSP3)
 #endif
 
+#ifndef cpu_has_loongson_mmi
+#define cpu_has_loongson_mmi		__ase(MIPS_ASE_LOONGSON_MMI)
+#endif
+
+#ifndef cpu_has_loongson_cam
+#define cpu_has_loongson_cam		__ase(MIPS_ASE_LOONGSON_CAM)
+#endif
+
+#ifndef cpu_has_loongson_ext
+#define cpu_has_loongson_ext		__ase(MIPS_ASE_LOONGSON_EXT)
+#endif
+
+#ifndef cpu_has_loongson_ext2
+#define cpu_has_loongson_ext2		__ase(MIPS_ASE_LOONGSON_EXT2)
+#endif
+
 #ifndef cpu_has_mipsmt
 #define cpu_has_mipsmt		__isa_lt_and_ase(6, MIPS_ASE_MIPSMT)
 #endif
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 6ad7d3cabd91..cc15670ef43a 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -438,5 +438,9 @@  enum cpu_type_enum {
 #define MIPS_ASE_MSA		0x00000100 /* MIPS SIMD Architecture */
 #define MIPS_ASE_DSP3		0x00000200 /* Signal Processing ASE Rev 3*/
 #define MIPS_ASE_MIPS16E2	0x00000400 /* MIPS16e2 */
+#define MIPS_ASE_LOONGSON_MMI	0x00000800 /* Loongson MultiMedia extensions Instructions */
+#define MIPS_ASE_LOONGSON_CAM	0x00001000 /* Loongson CAM */
+#define MIPS_ASE_LOONGSON_EXT	0x00002000 /* Loongson EXTensions */
+#define MIPS_ASE_LOONGSON_EXT2	0x00004000 /* Loongson EXTensions R2 */
 
 #endif /* _ASM_CPU_H */
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 6126b77d5a62..f349be1cf5b8 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1577,6 +1577,8 @@  static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
 			__cpu_name[cpu] = "ICT Loongson-3";
 			set_elf_platform(cpu, "loongson3a");
 			set_isa(c, MIPS_CPU_ISA_M64R1);
+			c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
+				MIPS_ASE_LOONGSON_EXT);
 			break;
 		case PRID_REV_LOONGSON3B_R1:
 		case PRID_REV_LOONGSON3B_R2:
@@ -1584,6 +1586,8 @@  static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
 			__cpu_name[cpu] = "ICT Loongson-3";
 			set_elf_platform(cpu, "loongson3b");
 			set_isa(c, MIPS_CPU_ISA_M64R1);
+			c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
+				MIPS_ASE_LOONGSON_EXT);
 			break;
 		}
 
@@ -1950,6 +1954,8 @@  static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
 		decode_configs(c);
 		c->options |= MIPS_CPU_FTLB | MIPS_CPU_TLBINV | MIPS_CPU_LDPTE;
 		c->writecombine = _CACHE_UNCACHED_ACCELERATED;
+		c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
+			MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2);
 		break;
 	default:
 		panic("Unknown Loongson Processor ID!");
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index b2de408a259e..f8d36710cd58 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -124,6 +124,10 @@  static int show_cpuinfo(struct seq_file *m, void *v)
 	if (cpu_has_eva)	seq_printf(m, "%s", " eva");
 	if (cpu_has_htw)	seq_printf(m, "%s", " htw");
 	if (cpu_has_xpa)	seq_printf(m, "%s", " xpa");
+	if (cpu_has_loongson_mmi)	seq_printf(m, "%s", " loongson-mmi");
+	if (cpu_has_loongson_cam)	seq_printf(m, "%s", " loongson-cam");
+	if (cpu_has_loongson_ext)	seq_printf(m, "%s", " loongson-ext");
+	if (cpu_has_loongson_ext2)	seq_printf(m, "%s", " loongson-ext2");
 	seq_printf(m, "\n");
 
 	if (cpu_has_mmips) {