| Message ID | 20190716073656.24924-1-vladimir.kondratiev@linux.intel.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | b8bea8a5e5d942e62203416ab41edecaed4fda02 |
| Headers | show |
| Series | mips: fix cacheinfo | expand |
Hello, Vladimir Kondratiev wrote: > Because CONFIG_OF defined for MIPS, cacheinfo attempts to fill information > from DT, ignoring data filled by architecture routine. This leads to error > reported > > cacheinfo: Unable to detect cache hierarchy for CPU 0 > > Way to fix this provided in > commit fac51482577d ("drivers: base: cacheinfo: fix x86 with > CONFIG_OF enabled") > > Utilize same mechanism to report that cacheinfo set by architecture > specific function > > Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@linux.intel.com> Applied to mips-fixes. Thanks, Paul [ This message was auto-generated; if you believe anything is incorrect then please email paul.burton@mips.com to report it. ]
diff --git a/arch/mips/kernel/cacheinfo.c b/arch/mips/kernel/cacheinfo.c index e0dd66881da6..f777e44653d5 100644 --- a/arch/mips/kernel/cacheinfo.c +++ b/arch/mips/kernel/cacheinfo.c @@ -69,6 +69,8 @@ static int __populate_cache_leaves(unsigned int cpu) if (c->tcache.waysize) populate_cache(tcache, this_leaf, 3, CACHE_TYPE_UNIFIED); + this_cpu_ci->cpu_map_populated = true; + return 0; }
Because CONFIG_OF defined for MIPS, cacheinfo attempts to fill information from DT, ignoring data filled by architecture routine. This leads to error reported cacheinfo: Unable to detect cache hierarchy for CPU 0 Way to fix this provided in commit fac51482577d ("drivers: base: cacheinfo: fix x86 with CONFIG_OF enabled") Utilize same mechanism to report that cacheinfo set by architecture specific function Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@linux.intel.com> --- arch/mips/kernel/cacheinfo.c | 2 ++ 1 file changed, 2 insertions(+)