Message ID | 20191001215249.4157062-14-paul.burton@mips.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | 77d281b7966e476927a45c5fb272d720aa75bb95 |
Headers | show
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Series |
MIPS: barriers & atomics cleanups
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expand
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diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h index 841ff274ada6..24443ef29337 100644 --- a/arch/mips/include/asm/atomic.h +++ b/arch/mips/include/asm/atomic.h @@ -196,7 +196,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) { int result; - smp_mb__before_llsc(); + smp_mb__before_atomic(); if (kernel_uses_llsc) { int temp; @@ -237,7 +237,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) * another barrier here. */ if (!__SYNC_loongson3_war) - smp_llsc_mb(); + smp_mb__after_atomic(); return result; }
Use smp_mb__before_atomic() & smp_mb__after_atomic() in atomic_sub_if_positive() rather than the equivalent smp_mb__before_llsc() & smp_llsc_mb(). The former are more standard & this preps us for avoiding redundant duplicate barriers on Loongson3 in a later patch. Signed-off-by: Paul Burton <paul.burton@mips.com> --- Changes in v2: None arch/mips/include/asm/atomic.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)