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received-spf: None (protection.outlook.com: wavecomp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: xwFmUgZRnN/fc2FQIqrdzqBOEWrULQgJflhTSoP83DIvAJaxlAVQRfTQyP5PuvNSSE7oyoZBeGyOHMgAGXNVBC70ECptFRr9UNV8iF0zq8Z1ny1eudSxSBE4jSTq3Hhz6c6MJgsaj0ANGNoenwja7tesH+LF6kj1gHN8RQ6/VDeDqcVa/sM7OgbzYUmm+JHAN9FPOCh38newSfua7lnc9krH6C5F4t8xhqyNFPdkHnV/ER4NjtSQWZmZTMxJ2yD5+S+7gGyig/3C+8RTL1otoX60LzgXFdk7CBYWd+uQBv4i8y+Am8jEu7PxToxvWqvnUdULPyqJIyUIoodx808lac5po5Tut/0ReWjgqozgKxRfWi/zDm+XNldXwM2WPuWkbNq78Z45TilDqIOdQ0DEHva/DFqVAgHjO6U4HbjKo2o= MIME-Version: 1.0 X-OriginatorOrg: mips.com X-MS-Exchange-CrossTenant-Network-Message-Id: 75f2181c-5fb9-4009-2844-08d746b9c9bc X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Oct 2019 21:53:26.5429 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 463607d3-1db3-40a0-8a29-970c56230104 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: j+0eaYBHxe5dgOc8tlNJe8CqCwyDQZvTo6lEmR+gAg19D5GChaYlUL10igXucTWi+giYgWuyxem9mL8OARnaxA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR2201MB1439 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org set_bit() can set bits 0-15 using an ori instruction, rather than loading the value -1 into a register & then using an ins instruction. That is, rather than the following: li t0, -1 ll t1, 0(t2) ins t1, t0, 4, 1 sc t1, 0(t2) We can have the simpler: ll t1, 0(t2) ori t1, t1, 0x10 sc t1, 0(t2) The or path already allows immediates to be used, so simply restricting the ins path to bits that don't fit in immediates is sufficient to take advantage of this. Signed-off-by: Paul Burton --- Changes in v2: None arch/mips/include/asm/bitops.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h index e300960717e0..1e5739191ddf 100644 --- a/arch/mips/include/asm/bitops.h +++ b/arch/mips/include/asm/bitops.h @@ -77,7 +77,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) } #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) - if (__builtin_constant_p(bit)) { + if (__builtin_constant_p(bit) && (bit >= 16)) { loongson_llsc_mb(); do { __asm__ __volatile__(