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received-spf: None (protection.outlook.com: wavecomp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: 3F11ALBr7yTQ0oLvEluNaCWmUoK+jnAPI5RwXJWun0s2hhKyCx1/E06dRXvMgb8x9KvVKFACHkkDzSznmJrNqyYD9PRXSDKd0CC/ExOZu0YQ4z7g5PQ9BITdM/eDFikH9KEfShIAsUFTl78XQrjq7OxUkGzD2FKfSSFDtS0FMXAmoWXi6XR6xXw/kIF6v6JUBSGxOeorM6sU4bYjIdgCuspI/jKs3TFJbBE/pmX5hGPjWbu8LsnZvlmV4bO1xbhu2G5Ckc2oRdA8dCV2uktn4GayH9DzJxAsq8hCE4f1/AX4yX3vMWdEvHgp0cYAApW/vePWLjhXyvc8aFLR3NXhjwImqLdlRaDeZ7O33KdjjZ88gU+acnjUs/vmgRotteQeZBzMwqiT04k3jCCoffJ94wPvpzQPzsrswDqU+clH4O0= MIME-Version: 1.0 X-OriginatorOrg: mips.com X-MS-Exchange-CrossTenant-Network-Message-Id: a1f7219c-b493-435e-07c7-08d746b9d1a8 X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Oct 2019 21:53:39.8347 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 463607d3-1db3-40a0-8a29-970c56230104 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: rZD8yQWWFXdDhlxnSVfHNpPZVXxDFifzhTzrE9N2m2vRvc+q3tRjLV5H7C19SFRGkrzlSZCoW7K6KyORpUsmqg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR2201MB1581 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Generate the sync instructions required to workaround Loongson3 LL/SC errata within inline asm blocks, which feels a little safer than doing it from C where strictly speaking the compiler would be well within its rights to insert a memory access between the separate asm statements we previously had, containing sync & ll instructions respectively. Signed-off-by: Paul Burton --- Changes in v2: None arch/mips/kernel/syscall.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c index b0e25e913bdb..3ea288ca35f1 100644 --- a/arch/mips/kernel/syscall.c +++ b/arch/mips/kernel/syscall.c @@ -37,6 +37,7 @@ #include #include #include +#include #include #include @@ -132,12 +133,12 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new) [efault] "i" (-EFAULT) : "memory"); } else if (cpu_has_llsc) { - loongson_llsc_mb(); __asm__ __volatile__ ( " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " li %[err], 0 \n" "1: \n" + " " __SYNC(full, loongson3_war) " \n" user_ll("%[old]", "(%[addr])") " move %[tmp], %[new] \n" "2: \n"