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received-spf: None (protection.outlook.com: wavecomp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: 4gXRBRX+x+cUbJzD8n8EFzKlQjJ4NYJhGim73DkwiYanwP2H+EV1HSEIifteVV5AN6RMWlDuu6Q6QGK69HJ/m/9mKMEV+VWP3Wxjo9lbp5nijbcX8QJOqzjPO9iVINeOFd8aBmvE/CY4rYCKgLLXVY5OKVBf64kpGZCLHy7c2fGyF17W+sCM/39iSLJu48f5n9lM9Ua1F9LzCSNqALDLt1/C8KqId3r1ZRG7hYB3biKAwb+sWoVaMos6mgVUy2BgIt9/c6Rm8/O5qnCWygT8WKULatSRUbZ5f59D9aaEsmtqMqqN5bGpsscI+n7wGl6acF80BTIRAKueDQ2lB0OnAH7yU+WAU5Ab/vWGVGVVRASfG+r5HmQ3/cWtxCFV2WdIwC373NMjKdf+WhXIB9ocz3hJ1CdDWUIt/FQYaHH8bDg= MIME-Version: 1.0 X-OriginatorOrg: mips.com X-MS-Exchange-CrossTenant-Network-Message-Id: b18c0c9a-9b53-47a5-e6d1-08d746b9d2b6 X-MS-Exchange-CrossTenant-originalarrivaltime: 01 Oct 2019 21:53:41.6609 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 463607d3-1db3-40a0-8a29-970c56230104 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Wut9jReBp+CsVA459Y1Wnpf5Ka+nTOxJUOxZWf5xbs8n+NtOaRbszJEuoiZeI5v4pRmOkaQ7FfrYgyZK46qKLg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR2201MB1581 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Loongson3 systems with CONFIG_CPU_LOONGSON3_WORKAROUNDS enabled already emit a full completion barrier as part of the inline assembly containing LL/SC loops for atomic operations. As such the barrier emitted by __smp_mb__before_atomic() is redundant, and we can remove it. Signed-off-by: Paul Burton --- Changes in v2: None arch/mips/include/asm/barrier.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/mips/include/asm/barrier.h b/arch/mips/include/asm/barrier.h index 6d92d5ccdafa..49ff172a72b9 100644 --- a/arch/mips/include/asm/barrier.h +++ b/arch/mips/include/asm/barrier.h @@ -119,7 +119,17 @@ static inline void wmb(void) #define nudge_writes() mb() #endif -#define __smp_mb__before_atomic() __smp_mb__before_llsc() +/* + * In the Loongson3 LL/SC workaround case, all of our LL/SC loops already have + * a completion barrier immediately preceding the LL instruction. Therefore we + * can skip emitting a barrier from __smp_mb__before_atomic(). + */ +#ifdef CONFIG_CPU_LOONGSON3_WORKAROUNDS +# define __smp_mb__before_atomic() +#else +# define __smp_mb__before_atomic() __smp_mb__before_llsc() +#endif + #define __smp_mb__after_atomic() smp_llsc_mb() static inline void sync_ginv(void)