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[2/3] MIPS: ingenic: Add support for GCW Zero prototype

Message ID 20200525174155.457491-2-paul@crapouillou.net (mailing list archive)
State Mainlined
Commit d653d1ffba8ecd472a78a5f0210a04672060b27b
Headers show
Series [1/3] MIPS: ingenic: DTS: Add memory info of GCW Zero | expand

Commit Message

Paul Cercueil May 25, 2020, 5:41 p.m. UTC 
Add support for the GCW Zero prototype. The only (?) difference is that
it only has 256 MiB of RAM, compared to the 512 MiB of RAM of the retail
device.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/boot/dts/ingenic/gcw0_proto.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)
 create mode 100644 arch/mips/boot/dts/ingenic/gcw0_proto.dts
diff mbox series

Patch

diff --git a/arch/mips/boot/dts/ingenic/gcw0_proto.dts b/arch/mips/boot/dts/ingenic/gcw0_proto.dts
new file mode 100644
index 000000000000..02df22f8ae0f
--- /dev/null
+++ b/arch/mips/boot/dts/ingenic/gcw0_proto.dts
@@ -0,0 +1,13 @@ 
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+
+#include "gcw0.dts"
+
+/ {
+	model = "GCW Zero Prototype";
+};
+
+&memory {
+	/* Prototype has only 256 MiB of RAM */
+	reg = <0x0 0x10000000>;
+};