| Message ID | 20200617083231.3699090-4-noltari@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | bmips: add bcm6345 reset controller support | expand |
Hi Álvaro, thank you for the patch. A few comments below: On Wed, 2020-06-17 at 10:32 +0200, Álvaro Fernández Rojas wrote: > Add support for resetting blocks through the Linux reset controller > subsystem for BCM63xx SoCs. > > Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> > Reviewed-by: Florian Fainelli <F.fainelli@gmail.com> > --- > v6: driver improvements: > - use devm_platform_ioremap_resource. > - simplify bcm6345_reset_probe return. > - introduce and use to_bcm6345_reset function. > v5: fix kbuild robot error (drop __init). > v4: no changes. > v3: using reset-simple isn't possible since sleeping after performing the > reset is also needed. > v2: add compatibility to reset-simple instead of adding a new driver. > > drivers/reset/Kconfig | 7 ++ > drivers/reset/Makefile | 1 + > drivers/reset/reset-bcm6345.c | 132 ++++++++++++++++++++++++++++++++++ > 3 files changed, 140 insertions(+) > create mode 100644 drivers/reset/reset-bcm6345.c > > diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig > index d9efbfd29646..9f1da978cef6 100644 > --- a/drivers/reset/Kconfig > +++ b/drivers/reset/Kconfig > @@ -41,6 +41,13 @@ config RESET_BERLIN > help > This enables the reset controller driver for Marvell Berlin SoCs. > > +config RESET_BCM6345 > + bool "BCM6345 Reset Controller" > + depends on BMIPS_GENERIC || COMPILE_TEST > + default BMIPS_GENERIC > + help > + This enables the reset controller driver for BCM6345 SoCs. > + Please sort these alphabetically. > config RESET_BRCMSTB > tristate "Broadcom STB reset controller" > depends on ARCH_BRCMSTB || COMPILE_TEST > diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile > index 249ed357c997..e642aae42f0f 100644 > --- a/drivers/reset/Makefile > +++ b/drivers/reset/Makefile > @@ -6,6 +6,7 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/ > obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o > obj-$(CONFIG_RESET_ATH79) += reset-ath79.o > obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o > +obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o This is the right place. > obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o > obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o > obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o > diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c > new file mode 100644 > index 000000000000..3eedea226028 > --- /dev/null > +++ b/drivers/reset/reset-bcm6345.c > @@ -0,0 +1,132 @@ > +// SPDX-License-Identifier: GPL-2.0-or-later > +/* > + * BCM6345 Reset Controller Driver > + * > + * Copyright (C) 2020 Álvaro Fernández Rojas <noltari@gmail.com> > + */ > + > +#include <linux/delay.h> > +#include <linux/init.h> > +#include <linux/io.h> > +#include <linux/mod_devicetable.h> > +#include <linux/platform_device.h> > +#include <linux/reset-controller.h> > + > +#define BCM6345_RESET_NUM 32 > +#define BCM6345_RESET_SLEEP_MIN_US 10000 > +#define BCM6345_RESET_SLEEP_MAX_US 20000 > + > +struct bcm6345_reset { > + struct reset_controller_dev rcdev; > + void __iomem *base; > + spinlock_t lock; > +}; > + > +static inline struct bcm6345_reset * > +to_bcm6345_reset(struct reset_controller_dev *rcdev) > +{ > + return container_of(rcdev, struct bcm6345_reset, rcdev); > +} > + > +static void bcm6345_reset_update(struct reset_controller_dev *rcdev, > + unsigned long id, bool assert) > +{ > + struct bcm6345_reset *bcm6345_reset = to_bcm6345_reset(rcdev); > + unsigned long flags; > + uint32_t val; > + > + spin_lock_irqsave(&bcm6345_reset->lock, flags); > + val = __raw_readl(bcm6345_reset->base); > + if (assert) > + val &= ~BIT(id); > + else > + val |= BIT(id); > + __raw_writel(val, bcm6345_reset->base); > + spin_unlock_irqrestore(&bcm6345_reset->lock, flags); > +} > + > +static int bcm6345_reset_assert(struct reset_controller_dev *rcdev, > + unsigned long id) > +{ > + bcm6345_reset_update(rcdev, id, true); > + > + return 0; > +} > + > +static int bcm6345_reset_deassert(struct reset_controller_dev *rcdev, > + unsigned long id) > +{ > + bcm6345_reset_update(rcdev, id, false); > + > + return 0; These two could be shortened if you let bcm6345_reset_update() return 0: return bcm6345_reset_update(rcdev, id, false); > +} > + > +static int bcm6345_reset_reset(struct reset_controller_dev *rcdev, > + unsigned long id) > +{ > + bcm6345_reset_update(rcdev, id, true); > + usleep_range(BCM6345_RESET_SLEEP_MIN_US, > + BCM6345_RESET_SLEEP_MAX_US); > + > + bcm6345_reset_update(rcdev, id, false); This second sleep is unusual: > + usleep_range(BCM6345_RESET_SLEEP_MIN_US, > + BCM6345_RESET_SLEEP_MAX_US); Could you add a comment describing why it is needed? Otherwise, Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> regards Philipp
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index d9efbfd29646..9f1da978cef6 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -41,6 +41,13 @@ config RESET_BERLIN help This enables the reset controller driver for Marvell Berlin SoCs. +config RESET_BCM6345 + bool "BCM6345 Reset Controller" + depends on BMIPS_GENERIC || COMPILE_TEST + default BMIPS_GENERIC + help + This enables the reset controller driver for BCM6345 SoCs. + config RESET_BRCMSTB tristate "Broadcom STB reset controller" depends on ARCH_BRCMSTB || COMPILE_TEST diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 249ed357c997..e642aae42f0f 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -6,6 +6,7 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/ obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o obj-$(CONFIG_RESET_ATH79) += reset-ath79.o obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o +obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o diff --git a/drivers/reset/reset-bcm6345.c b/drivers/reset/reset-bcm6345.c new file mode 100644 index 000000000000..3eedea226028 --- /dev/null +++ b/drivers/reset/reset-bcm6345.c @@ -0,0 +1,132 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * BCM6345 Reset Controller Driver + * + * Copyright (C) 2020 Álvaro Fernández Rojas <noltari@gmail.com> + */ + +#include <linux/delay.h> +#include <linux/init.h> +#include <linux/io.h> +#include <linux/mod_devicetable.h> +#include <linux/platform_device.h> +#include <linux/reset-controller.h> + +#define BCM6345_RESET_NUM 32 +#define BCM6345_RESET_SLEEP_MIN_US 10000 +#define BCM6345_RESET_SLEEP_MAX_US 20000 + +struct bcm6345_reset { + struct reset_controller_dev rcdev; + void __iomem *base; + spinlock_t lock; +}; + +static inline struct bcm6345_reset * +to_bcm6345_reset(struct reset_controller_dev *rcdev) +{ + return container_of(rcdev, struct bcm6345_reset, rcdev); +} + +static void bcm6345_reset_update(struct reset_controller_dev *rcdev, + unsigned long id, bool assert) +{ + struct bcm6345_reset *bcm6345_reset = to_bcm6345_reset(rcdev); + unsigned long flags; + uint32_t val; + + spin_lock_irqsave(&bcm6345_reset->lock, flags); + val = __raw_readl(bcm6345_reset->base); + if (assert) + val &= ~BIT(id); + else + val |= BIT(id); + __raw_writel(val, bcm6345_reset->base); + spin_unlock_irqrestore(&bcm6345_reset->lock, flags); +} + +static int bcm6345_reset_assert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + bcm6345_reset_update(rcdev, id, true); + + return 0; +} + +static int bcm6345_reset_deassert(struct reset_controller_dev *rcdev, + unsigned long id) +{ + bcm6345_reset_update(rcdev, id, false); + + return 0; +} + +static int bcm6345_reset_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + bcm6345_reset_update(rcdev, id, true); + usleep_range(BCM6345_RESET_SLEEP_MIN_US, + BCM6345_RESET_SLEEP_MAX_US); + + bcm6345_reset_update(rcdev, id, false); + usleep_range(BCM6345_RESET_SLEEP_MIN_US, + BCM6345_RESET_SLEEP_MAX_US); + + return 0; +} + +static int bcm6345_reset_status(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct bcm6345_reset *bcm6345_reset = to_bcm6345_reset(rcdev); + + return !(__raw_readl(bcm6345_reset->base) & BIT(id)); +} + +static struct reset_control_ops bcm6345_reset_ops = { + .assert = bcm6345_reset_assert, + .deassert = bcm6345_reset_deassert, + .reset = bcm6345_reset_reset, + .status = bcm6345_reset_status, +}; + +static int bcm6345_reset_probe(struct platform_device *pdev) +{ + struct bcm6345_reset *bcm6345_reset; + + bcm6345_reset = devm_kzalloc(&pdev->dev, + sizeof(*bcm6345_reset), GFP_KERNEL); + if (!bcm6345_reset) + return -ENOMEM; + + platform_set_drvdata(pdev, bcm6345_reset); + + bcm6345_reset->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(bcm6345_reset->base)) + return PTR_ERR(bcm6345_reset->base); + + spin_lock_init(&bcm6345_reset->lock); + bcm6345_reset->rcdev.ops = &bcm6345_reset_ops; + bcm6345_reset->rcdev.owner = THIS_MODULE; + bcm6345_reset->rcdev.of_node = pdev->dev.of_node; + bcm6345_reset->rcdev.of_reset_n_cells = 1; + bcm6345_reset->rcdev.nr_resets = BCM6345_RESET_NUM; + + return devm_reset_controller_register(&pdev->dev, + &bcm6345_reset->rcdev); +} + +static const struct of_device_id bcm6345_reset_of_match[] = { + { .compatible = "brcm,bcm6345-reset" }, + { /* sentinel */ }, +}; + +static struct platform_driver bcm6345_reset_driver = { + .probe = bcm6345_reset_probe, + .driver = { + .name = "bcm6345-reset", + .of_match_table = bcm6345_reset_of_match, + .suppress_bind_attrs = true, + }, +}; +builtin_platform_driver(bcm6345_reset_driver);