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[88.20.62.90]) by smtp.gmail.com with ESMTPSA id a16sm32596863wrx.8.2020.06.17.01.32.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 17 Jun 2020 01:32:42 -0700 (PDT) From: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= To: p.zabel@pengutronix.de, robh+dt@kernel.org, tsbogend@alpha.franken.de, f.fainelli@gmail.com, jonas.gorski@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com Cc: =?utf-8?q?=C3=81lvaro_Fern=C3=A1ndez_Rojas?= Subject: [PATCH v6 8/9] mips: bmips: dts: add BCM63268 reset controller support Date: Wed, 17 Jun 2020 10:32:30 +0200 Message-Id: <20200617083231.3699090-9-noltari@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200617083231.3699090-1-noltari@gmail.com> References: <20200617083231.3699090-1-noltari@gmail.com> MIME-Version: 1.0 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org BCM63268 SoCs have a reset controller for certain components. Signed-off-by: Álvaro Fernández Rojas Acked-by: Florian Fainelli --- v6: no changes. v5: no changes. v4: no changes. v3: add new path with BCM63268 reset controller support. arch/mips/boot/dts/brcm/bcm63268.dtsi | 6 +++++ include/dt-bindings/reset/bcm63268-reset.h | 26 ++++++++++++++++++++++ 2 files changed, 32 insertions(+) create mode 100644 include/dt-bindings/reset/bcm63268-reset.h diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi index beec24145af7..0150da7e3905 100644 --- a/arch/mips/boot/dts/brcm/bcm63268.dtsi +++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi @@ -70,6 +70,12 @@ reboot: syscon-reboot@10000008 { mask = <0x1>; }; + periph_rst: reset-controller@10000010 { + compatible = "brcm,bcm6345-reset"; + reg = <0x10000010 0x4>; + #reset-cells = <1>; + }; + periph_intc: interrupt-controller@10000020 { compatible = "brcm,bcm6345-l1-intc"; reg = <0x10000020 0x20>, diff --git a/include/dt-bindings/reset/bcm63268-reset.h b/include/dt-bindings/reset/bcm63268-reset.h new file mode 100644 index 000000000000..6a6403a4c2d5 --- /dev/null +++ b/include/dt-bindings/reset/bcm63268-reset.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __DT_BINDINGS_RESET_BCM63268_H +#define __DT_BINDINGS_RESET_BCM63268_H + +#define BCM63268_RST_SPI 0 +#define BCM63268_RST_IPSEC 1 +#define BCM63268_RST_EPHY 2 +#define BCM63268_RST_SAR 3 +#define BCM63268_RST_ENETSW 4 +#define BCM63268_RST_USBS 5 +#define BCM63268_RST_USBH 6 +#define BCM63268_RST_PCM 7 +#define BCM63268_RST_PCIE_CORE 8 +#define BCM63268_RST_PCIE 9 +#define BCM63268_RST_PCIE_EXT 10 +#define BCM63268_RST_WLAN_SHIM 11 +#define BCM63268_RST_DDR_PHY 12 +#define BCM63268_RST_FAP0 13 +#define BCM63268_RST_WLAN_UBUS 14 +#define BCM63268_RST_DECT 15 +#define BCM63268_RST_FAP1 16 +#define BCM63268_RST_PCIE_HARD 17 +#define BCM63268_RST_GPHY 18 + +#endif /* __DT_BINDINGS_RESET_BCM63268_H */