From patchwork Fri Jun 19 14:32:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 11614665 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0F3A814DD for ; Fri, 19 Jun 2020 16:36:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EA4F921527 for ; Fri, 19 Jun 2020 16:36:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1592584607; bh=CKdKwvcY/fb4n4u7xICRN+j5znN2zpd/bFyAEIqpr28=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=LB41adxpSut7pWB4MxQSQUxTAIuolL2j3c+l6lmK2eJfa58UPeWJvmYPXYwHn2LHg FrCsMwQrd//H2BOczyqm7Wmbb0wrc079MUuSs7CbsHffjCLs41bB40eaOeXhSfHrj/ hX9TzWY3AG/DyTEhWgIU3Rx5ml51rqf9EXURAeHE= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389507AbgFSQgi (ORCPT ); Fri, 19 Jun 2020 12:36:38 -0400 Received: from mail.kernel.org ([198.145.29.99]:41610 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389167AbgFSOtE (ORCPT ); Fri, 19 Jun 2020 10:49:04 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id A50FC20DD4; Fri, 19 Jun 2020 14:49:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1592578144; bh=CKdKwvcY/fb4n4u7xICRN+j5znN2zpd/bFyAEIqpr28=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UmjBChimo0IepVIDJ4Cw8GtpdvMj6ZoG2211uqPxJwGgbObK5lK0K8eXC4hEbRWWj u8l7zvGRdtPbT0USkuzAEJPe/d/hG0DUmavobW7yY1pDi2Sta6G1VW6+UwzmKS2wPt wLTSiRfDPkuDSjrnG8UBn0DUgP/RRX+vL/ZMHszk= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Serge Semin , Andy Shevchenko , Georgy Vlasov , Ramil Zaripov , Alexey Malahov , Thomas Bogendoerfer , Arnd Bergmann , Feng Tang , Rob Herring , linux-mips@vger.kernel.org, devicetree@vger.kernel.org, Mark Brown , Sasha Levin Subject: [PATCH 4.14 092/190] spi: dw: Fix Rx-only DMA transfers Date: Fri, 19 Jun 2020 16:32:17 +0200 Message-Id: <20200619141638.192320638@linuxfoundation.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200619141633.446429600@linuxfoundation.org> References: <20200619141633.446429600@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: linux-mips-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Serge Semin [ Upstream commit 46164fde6b7890e7a3982d54549947c8394c0192 ] Tx-only DMA transfers are working perfectly fine since in this case the code just ignores the Rx FIFO overflow interrupts. But it turns out the SPI Rx-only transfers are broken since nothing pushing any data to the shift registers, so the Rx FIFO is left empty and the SPI core subsystems just returns a timeout error. Since DW DMAC driver doesn't support something like cyclic write operations of a single byte to a device register, the only way to support the Rx-only SPI transfers is to fake it by using a dummy Tx-buffer. This is what we intend to fix in this commit by setting the SPI_CONTROLLER_MUST_TX flag for DMA-capable platform. Signed-off-by: Serge Semin Reviewed-by: Andy Shevchenko Cc: Georgy Vlasov Cc: Ramil Zaripov Cc: Alexey Malahov Cc: Thomas Bogendoerfer Cc: Arnd Bergmann Cc: Feng Tang Cc: Rob Herring Cc: linux-mips@vger.kernel.org Cc: devicetree@vger.kernel.org Link: https://lore.kernel.org/r/20200529131205.31838-9-Sergey.Semin@baikalelectronics.ru Signed-off-by: Mark Brown Signed-off-by: Sasha Levin --- drivers/spi/spi-dw.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c index b11d0cd3fd20..9fcee7273a79 100644 --- a/drivers/spi/spi-dw.c +++ b/drivers/spi/spi-dw.c @@ -531,6 +531,7 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws) dws->dma_inited = 0; } else { master->can_dma = dws->dma_ops->can_dma; + master->flags |= SPI_CONTROLLER_MUST_TX; } }