| Message ID | 20200801154401.4177009-1-romain.naour@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [PATCHv3] mips: Do not include hi and lo in clobber list for R6 | expand |
On Sat, 1 Aug 2020, Romain Naour wrote: > v3 Avoid duplicate code (Maciej W. Rozycki) > v2 use MIPS_ISA_REV instead of __mips_isa_rev (Alexander Lobakin) > --- > arch/mips/include/asm/vdso/gettimeofday.h | 30 +++++++++++++++++++---- > 1 file changed, 25 insertions(+), 5 deletions(-) > > diff --git a/arch/mips/include/asm/vdso/gettimeofday.h b/arch/mips/include/asm/vdso/gettimeofday.h > index c63ddcaea54c..93008551282e 100644 > --- a/arch/mips/include/asm/vdso/gettimeofday.h > +++ b/arch/mips/include/asm/vdso/gettimeofday.h > @@ -35,7 +35,11 @@ static __always_inline long gettimeofday_fallback( > : "=r" (ret), "=r" (error) > : "r" (tv), "r" (tz), "r" (nr) > : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", > - "$14", "$15", "$24", "$25", "hi", "lo", "memory"); > + "$14", "$15", "$24", "$25", > +#if MIPS_ISA_REV < 6 > + "hi", "lo", > +#endif > + "memory"); Can you please use a helper macro, say GCC_REGS_HI_LO, moving the details into a separate header, just as I suggested with examples given? My very point was to avoid `#if MIPS_ISA_REV < 6' sprinkled throughout code. Also I note all the clobbers are the same across all the syscalls used here, so another possibility is to have a macro like VDSO_SYSCALL_CLOBBERS defined in a single place according to the architecture level, and then just use it throughout avoiding code duplication. Maciej
diff --git a/arch/mips/include/asm/vdso/gettimeofday.h b/arch/mips/include/asm/vdso/gettimeofday.h index c63ddcaea54c..93008551282e 100644 --- a/arch/mips/include/asm/vdso/gettimeofday.h +++ b/arch/mips/include/asm/vdso/gettimeofday.h @@ -35,7 +35,11 @@ static __always_inline long gettimeofday_fallback( : "=r" (ret), "=r" (error) : "r" (tv), "r" (tz), "r" (nr) : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", - "$14", "$15", "$24", "$25", "hi", "lo", "memory"); + "$14", "$15", "$24", "$25", +#if MIPS_ISA_REV < 6 + "hi", "lo", +#endif + "memory"); return error ? -ret : ret; } @@ -59,7 +63,11 @@ static __always_inline long clock_gettime_fallback( : "=r" (ret), "=r" (error) : "r" (clkid), "r" (ts), "r" (nr) : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", - "$14", "$15", "$24", "$25", "hi", "lo", "memory"); + "$14", "$15", "$24", "$25", +#if MIPS_ISA_REV < 6 + "hi", "lo", +#endif + "memory"); return error ? -ret : ret; } @@ -83,7 +91,11 @@ static __always_inline int clock_getres_fallback( : "=r" (ret), "=r" (error) : "r" (clkid), "r" (ts), "r" (nr) : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", - "$14", "$15", "$24", "$25", "hi", "lo", "memory"); + "$14", "$15", "$24", "$25", +#if MIPS_ISA_REV < 6 + "hi", "lo", +#endif + "memory"); return error ? -ret : ret; } @@ -105,7 +117,11 @@ static __always_inline long clock_gettime32_fallback( : "=r" (ret), "=r" (error) : "r" (clkid), "r" (ts), "r" (nr) : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", - "$14", "$15", "$24", "$25", "hi", "lo", "memory"); + "$14", "$15", "$24", "$25", +#if MIPS_ISA_REV < 6 + "hi", "lo", +#endif + "memory"); return error ? -ret : ret; } @@ -125,7 +141,11 @@ static __always_inline int clock_getres32_fallback( : "=r" (ret), "=r" (error) : "r" (clkid), "r" (ts), "r" (nr) : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", - "$14", "$15", "$24", "$25", "hi", "lo", "memory"); + "$14", "$15", "$24", "$25", +#if MIPS_ISA_REV < 6 + "hi", "lo", +#endif + "memory"); return error ? -ret : ret; }
From [1] "GCC 10 (PR 91233) won't silently allow registers that are not architecturally available to be present in the clobber list anymore, resulting in build failure for mips*r6 targets in form of: ... .../sysdep.h:146:2: error: the register ‘lo’ cannot be clobbered in ‘asm’ for the current target 146 | __asm__ volatile ( \ | ^~~~~~~ This is because base R6 ISA doesn't define hi and lo registers w/o DSP extension. This patch provides the alternative clobber list for r6 targets that won't include those registers." Since kernel 5.4 and mips support for generic vDSO [2], the kernel fail to build for mips r6 cpus with gcc 10 for the same reason as glibc. [1] https://sourceware.org/git/?p=glibc.git;a=commit;h=020b2a97bb15f807c0482f0faee2184ed05bcad8 [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=24640f233b466051ad3a5d2786d2951e43026c9d Signed-off-by: Romain Naour <romain.naour@gmail.com> --- v3 Avoid duplicate code (Maciej W. Rozycki) v2 use MIPS_ISA_REV instead of __mips_isa_rev (Alexander Lobakin) --- arch/mips/include/asm/vdso/gettimeofday.h | 30 +++++++++++++++++++---- 1 file changed, 25 insertions(+), 5 deletions(-)