| Message ID | 20200821072329.18006-1-huangpei@loongson.cn (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/3] MIPS: add missing MSACSR and upper MSA initialization | expand |
Hi, Pei, On Fri, Aug 21, 2020 at 3:26 PM Huang Pei <huangpei@loongson.cn> wrote: > > own_fp_inatomic() does not restore/initialize MSACSR and upper MSA regs, so > MSACSR and MSA upper regs's value from previous task on current cpu can leak > into current task and cause unpredictable behavior when MSA context not > initialized. > > Signed-off-by: Huang Pei <huangpei@loongson.cn> > --- > arch/mips/kernel/traps.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c > index 38aa07ccdbcc..99a8f1b7b522 100644 > --- a/arch/mips/kernel/traps.c > +++ b/arch/mips/kernel/traps.c > @@ -1287,6 +1287,8 @@ static int enable_restore_fp_context(int msa) > err = own_fpu_inatomic(1); > if (msa && !err) { > enable_msa(); > + write_msa_csr(current->thread.fpu.msacsr); > + init_msa_upper(); I think write_msa_csr(current->thread.fpu.msacsr) is needed here, but I don't know whether init_msa_upper() is also needed. Maybe you should investegate cc97ab235f3fe32401ca198cebe6f42642e9 ("MIPS: Simplify FP context initialization") which removes init_msa_upper(). Huacai > set_thread_flag(TIF_USEDMSA); > set_thread_flag(TIF_MSA_CTX_LIVE); > } > -- > 2.17.1 >
Hi, Paul Burton, On Mon, Aug 24, 2020 at 3:19 PM Huacai Chen <chenhc@lemote.com> wrote: > > Hi, Pei, > > On Fri, Aug 21, 2020 at 3:26 PM Huang Pei <huangpei@loongson.cn> wrote: > > > > own_fp_inatomic() does not restore/initialize MSACSR and upper MSA regs, so > > MSACSR and MSA upper regs's value from previous task on current cpu can leak > > into current task and cause unpredictable behavior when MSA context not > > initialized. > > > > Signed-off-by: Huang Pei <huangpei@loongson.cn> > > --- > > arch/mips/kernel/traps.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c > > index 38aa07ccdbcc..99a8f1b7b522 100644 > > --- a/arch/mips/kernel/traps.c > > +++ b/arch/mips/kernel/traps.c > > @@ -1287,6 +1287,8 @@ static int enable_restore_fp_context(int msa) > > err = own_fpu_inatomic(1); > > if (msa && !err) { > > enable_msa(); > > + write_msa_csr(current->thread.fpu.msacsr); > > + init_msa_upper(); > I think write_msa_csr(current->thread.fpu.msacsr) is needed here, but > I don't know whether init_msa_upper() is also needed. Maybe you should > investegate cc97ab235f3fe32401ca198cebe6f42642e9 ("MIPS: Simplify FP > context initialization") which removes init_msa_upper(). I think I need you to explain why removing init_msa_upper() here. Huacai > > Huacai > > set_thread_flag(TIF_USEDMSA); > > set_thread_flag(TIF_MSA_CTX_LIVE); > > } > > -- > > 2.17.1 > >
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 38aa07ccdbcc..99a8f1b7b522 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1287,6 +1287,8 @@ static int enable_restore_fp_context(int msa) err = own_fpu_inatomic(1); if (msa && !err) { enable_msa(); + write_msa_csr(current->thread.fpu.msacsr); + init_msa_upper(); set_thread_flag(TIF_USEDMSA); set_thread_flag(TIF_MSA_CTX_LIVE); }
own_fp_inatomic() does not restore/initialize MSACSR and upper MSA regs, so MSACSR and MSA upper regs's value from previous task on current cpu can leak into current task and cause unpredictable behavior when MSA context not initialized. Signed-off-by: Huang Pei <huangpei@loongson.cn> --- arch/mips/kernel/traps.c | 2 ++ 1 file changed, 2 insertions(+)