From patchwork Tue Nov 10 11:45:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gregory CLEMENT X-Patchwork-Id: 11894239 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 91F75921 for ; Tue, 10 Nov 2020 11:58:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7976020781 for ; Tue, 10 Nov 2020 11:58:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728272AbgKJL65 (ORCPT ); Tue, 10 Nov 2020 06:58:57 -0500 Received: from mslow2.mail.gandi.net ([217.70.178.242]:56016 "EHLO mslow2.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726428AbgKJL64 (ORCPT ); Tue, 10 Nov 2020 06:58:56 -0500 Received: from relay12.mail.gandi.net (unknown [217.70.178.232]) by mslow2.mail.gandi.net (Postfix) with ESMTP id D88DA3B21E9 for ; Tue, 10 Nov 2020 11:45:38 +0000 (UTC) Received: from localhost (82-65-9-182.subs.proxad.net [82.65.9.182]) (Authenticated sender: gregory.clement@bootlin.com) by relay12.mail.gandi.net (Postfix) with ESMTPSA id 68B8A200002; Tue, 10 Nov 2020 11:45:15 +0000 (UTC) From: Gregory CLEMENT To: Alexandre Belloni , Microchip Linux Driver Support , Thomas Bogendoerfer , linux-mips@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org Cc: Thomas Petazzoni , Lars Povlsen , , Gregory CLEMENT , Rob Herring Subject: [PATCH v2 2/9] dt-bindings: mips: Add Serval and Jaguar2 Date: Tue, 10 Nov 2020 12:45:01 +0100 Message-Id: <20201110114508.1197652-3-gregory.clement@bootlin.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201110114508.1197652-1-gregory.clement@bootlin.com> References: <20201110114508.1197652-1-gregory.clement@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org Serval and Jaguar2 SoCs belong to the same family as Ocelot and Luton. Acked-by: Rob Herring Signed-off-by: Gregory CLEMENT Reviewed-by: Alexandre Belloni --- Documentation/devicetree/bindings/mips/mscc.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mips/mscc.txt b/Documentation/devicetree/bindings/mips/mscc.txt index cc93fd302553..cc916eaeed0a 100644 --- a/Documentation/devicetree/bindings/mips/mscc.txt +++ b/Documentation/devicetree/bindings/mips/mscc.txt @@ -4,7 +4,7 @@ Boards with a SoC of the Microsemi MIPS family shall have the following properties: Required properties: -- compatible: "mscc,ocelot" or "mscc,luton" +- compatible: "mscc,ocelot", "mscc,luton", "mscc,serval" or "mscc,jr2" * Other peripherals: