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Sat, 20 Feb 2021 06:36:31 +0000 From: YunQiang Su To: tsbogend@alpha.franken.de, linux-mips@vger.kernel.org, jiaxun.yang@flygoat.com Cc: stable@vger.kernel.org, YunQiang Su Subject: [PATCH v2] MIPS: use FR=0 for FPXX binary Date: Sat, 20 Feb 2021 06:36:15 +0000 Message-Id: <20210220063615.10271-1-yunqiang.su@cipunited.com> X-Mailer: git-send-email 2.20.1 X-Originating-IP: [60.247.76.83] X-ClientProxiedBy: HKAPR03CA0022.apcprd03.prod.outlook.com (2603:1096:203:c9::9) To HKAPR04MB3956.apcprd04.prod.outlook.com (2603:1096:203:d5::13) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (60.247.76.83) by HKAPR03CA0022.apcprd03.prod.outlook.com (2603:1096:203:c9::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3890.10 via Frontend Transport; Sat, 20 Feb 2021 06:36:30 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 6c990e99-19a0-44ab-8314-08d8d569dc13 X-MS-TrafficTypeDiagnostic: HK0PR04MB3042: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3276; 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X-MS-Exchange-AntiSpam-MessageData: uGHJdihMgwf4aPQJa0HSPFx6BA38rgj7l+c7JRjTJsjUle+3nQHbUnTABao5lm9MzT3q849cVeL++ojXCnuDHHzv0RCxo7iOsiP+nlmz2TqHB2VGBi6GTfZJ9cQ3ABy7iZMl7/+QbPZXP73BPXf0rNgBc8nFHvnNpoUDiYZxJHIIcdcIBItUajYXamk0HwYTLAHgxxEiKUsvG2o6dsau/39dUHEszHpfgA/ZoPGXfDf0yBd6SHYx7YnfuB/IBtofPnToSCEROvUbVYBvQKkNHMPvUnm2EOhjhBd5Ss75e8t1uosUq4c++xoYbRFHMQuUV1QQGL30ZvCl/aq8vCgNKyJdZkXNZT5tb6WBgUPM7rEmZRmlsSQ34oEzDAT9Wm40RHa4roYWctOlBPGqT8IS62NLChqlAiiRakdJkFBTPLjS4TEXqsC7ZMQZ4juRHiLA5G8lsBmsCIryK33+fXdNS4BUomEhm/5qPGVnfVLT+Vws/9aQgf3ER9P/syFKmwxd6CkTP3YZYcf67cMsFj0viDffESlFDjc5VYMuxPpdqJqeaiyOH0dh/qoITxiH4Lw65OWRY3uNPZ+Ar7jWPKpqTzCWR/S6+CCXng+koNVcqkamgEKDlflfY/Gm0E2vc18l7ThTBW49pPXQ9Nge2JwFEHMFp9XZttbGLwNGZ183fB/bx/A5CxX5OvpFzEahXIa8/DKVgDs25gTDKPmq0KAfWlu73Age6CibRPhHXIi+tYIA1JUFAZWBqxU/ykaBGArHtS26swlVCWblnHbSTMQoPX+0MwYXNGwOAvElpUYUSNb0hl5TqYPmpUtjZhN8ISOg4YuPry8yrnvXNlkKNowkNVh5u5a8T1VKR3HnT40zdoaAQDBM/KS9L6m2/jQ2bhkDSAlB2JkdWzjOS8Zhv8m/b7GMQn6jJjGOXZYSEDKiFQ34jmP19tv53cdt74A8uQqgxMmm8Rw8dg0PVSI6jwUFAVlAVxLge4IvzJr/7CDafkGxYqG18bJPmlv50VoswSEgQ14VPm81zNfRPw205tcguQEBKDL2KNaV/A4fUvGYukWek0fqauMSThG5UKfu/nkOTrpykWuQHKqZwB4DmHWveRaHnQ5VXx2foAiMTsutNuBJy/FzFZpkZNNqXmwUduykohSTurk8pGNzX6gqC/TqT4qzR+mJD0+KGkIWOCndRW1/9hC96R5gguQLclWa/6S4giW4dMfjGoSMo7Oceo4yA4BtW6dkdGK9X4ZMTAybbEgbBF2Scg6Bqv6R5mnYt1gPY8ZMi7GnkKbGlPsihkar9h0dmOj5mrpEoxhsb1Lk8z4xc1YxrEkFwm876UBfoHfG X-OriginatorOrg: cipunited.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6c990e99-19a0-44ab-8314-08d8d569dc13 X-MS-Exchange-CrossTenant-AuthSource: HKAPR04MB3956.apcprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Feb 2021 06:36:31.5136 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: e31cf5b5-ee69-4d5f-9c69-edeeda2458c0 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: +SelSxm5RGEndqtGC5JfMpSdhZCyzbps05wpRt7irKeyr6Qac9C3iqcpNhjj2y+LiAR5OYPhSOLJlkRiH7OgG/5d+xMW60hrgjaKl0/E3RI= X-MS-Exchange-Transport-CrossTenantHeadersStamped: HK0PR04MB3042 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org some binary, for example the output of golang, may be mark as FPXX, while in fact they are still FP32. Since FPXX binary can work with both FR=1 and FR=0, we force it to use FR=0 here. https://go-review.googlesource.com/c/go/+/239217 https://go-review.googlesource.com/c/go/+/237058 v1->v2: Fix bad commit message: in fact, we are switching to FR=0 --- arch/mips/kernel/elf.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/mips/kernel/elf.c b/arch/mips/kernel/elf.c index 7b045d2a0b51..bf798ce0ec0e 100644 --- a/arch/mips/kernel/elf.c +++ b/arch/mips/kernel/elf.c @@ -234,9 +234,10 @@ int arch_check_elf(void *_ehdr, bool has_interpreter, void *_interp_ehdr, * fpxx case. This is because, in any-ABI (or no-ABI) we have no FPU * instructions so we don't care about the mode. We will simply use * the one preferred by the hardware. In fpxx case, that ABI can - * handle both FR=1 and FR=0, so, again, we simply choose the one - * preferred by the hardware. Next, if we only use single-precision - * FPU instructions, and the default ABI FPU mode is not good + * handle both FR=1 and FR=0. Here, we use FR=0, because some + * binaries may be mark as FPXX by mistake (ie, output of golang). + * - If we only use single-precision FPU instructions, + * and the default ABI FPU mode is not good * (ie single + any ABI combination), we set again the FPU mode to the * one is preferred by the hardware. Next, if we know that the code * will only use single-precision instructions, shown by single being @@ -248,8 +249,9 @@ int arch_check_elf(void *_ehdr, bool has_interpreter, void *_interp_ehdr, */ if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1) state->overall_fp_mode = FP_FRE; - else if ((prog_req.fr1 && prog_req.frdefault) || - (prog_req.single && !prog_req.frdefault)) + else if (prog_req.fr1 && prog_req.frdefault) + state->overall_fp_mode = FP_FR0; + else if (prog_req.single && !prog_req.frdefault) /* Make sure 64-bit MIPS III/IV/64R1 will not pick FR1 */ state->overall_fp_mode = ((raw_current_cpu_data.fpu_id & MIPS_FPIR_F64) && cpu_has_mips_r2_r6) ?