[v2,3/3] MIPS: kernel: proc: add CPU option reporting

Message ID	20210424215618.1017539-4-ilya.lipnitskiy@gmail.com (mailing list archive)
State	Superseded
Headers	show Return-Path: <linux-mips-owner@kernel.org> From: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com> To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>, Jiri Kosina <trivial@kernel.org>, Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>, Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>, Serge Semin <Sergey.Semin@baikalelectronics.ru>, Hauke Mehrtens <hauke@hauke-m.de>, linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 3/3] MIPS: kernel: proc: add CPU option reporting Date: Sat, 24 Apr 2021 14:56:18 -0700 Message-Id: <20210424215618.1017539-4-ilya.lipnitskiy@gmail.com> In-Reply-To: <20210424215618.1017539-1-ilya.lipnitskiy@gmail.com> References: <20210424215618.1017539-1-ilya.lipnitskiy@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	MIPS: kernel: proc: fix style and add CPU option reporting \| expand [v2,0/3] MIPS: kernel: proc: fix style and add CPU option reporting [v2,1/3] MIPS: kernel: proc: fix trivial style errors [v2,2/3] MIPS: kernel: proc: use seq_puts instead of seq_printf [v2,3/3] MIPS: kernel: proc: add CPU option reporting

Message ID

20210424215618.1017539-4-ilya.lipnitskiy@gmail.com (mailing list archive)

State

Superseded

Headers

From: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
        Jiri Kosina <trivial@kernel.org>,
        Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>,
        Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,
        Serge Semin <Sergey.Semin@baikalelectronics.ru>,
        Hauke Mehrtens <hauke@hauke-m.de>, linux-mips@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: [PATCH v2 3/3] MIPS: kernel: proc: add CPU option reporting
Date: Sat, 24 Apr 2021 14:56:18 -0700
Message-Id: <20210424215618.1017539-4-ilya.lipnitskiy@gmail.com>
In-Reply-To: <20210424215618.1017539-1-ilya.lipnitskiy@gmail.com>
References: <20210424215618.1017539-1-ilya.lipnitskiy@gmail.com>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

Series

MIPS: kernel: proc: fix style and add CPU option reporting | expand

Commit Message

Ilya Lipnitskiy April 24, 2021, 9:56 p.m. UTC

From: Hauke Mehrtens <hauke@hauke-m.de>

Many MIPS CPUs have optional CPU features which are not activated for
all CPU cores. Print the CPU options, which are implemented in the core,
in /proc/cpuinfo. This makes it possible to see which features are
supported and which are not supported. This should cover all standard
MIPS extensions. Before, it only printed information about the main MIPS
ASEs.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

Changes from original patch[0]:
- Remove cpu_has_6k_cache and cpu_has_8k_cache due to commit 6ce91ba8589a
  ("MIPS: Remove cpu_has_6k_cache and cpu_has_8k_cache in cpu_cache_init()")
- Add new options: mac2008_only, ftlbparex, gsexcex, mmid, mm_sysad,
  mm_full
- Use seq_puts instead of seq_printf as suggested by checkpatch
- Minor commit message reword

[0]: https://lore.kernel.org/linux-mips/20181223225224.23042-1-hauke@hauke-m.de/
Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
---
 arch/mips/kernel/proc.c | 122 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 122 insertions(+)

Comments

Hauke Mehrtens April 26, 2021, 9:42 p.m. UTC | #1

On 4/24/21 11:56 PM, Ilya Lipnitskiy wrote:
> From: Hauke Mehrtens <hauke@hauke-m.de>
> 
> Many MIPS CPUs have optional CPU features which are not activated for
> all CPU cores. Print the CPU options, which are implemented in the core,
> in /proc/cpuinfo. This makes it possible to see which features are
> supported and which are not supported. This should cover all standard
> MIPS extensions. Before, it only printed information about the main MIPS
> ASEs.
> 
> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
> 
> Changes from original patch[0]:
> - Remove cpu_has_6k_cache and cpu_has_8k_cache due to commit 6ce91ba8589a
>    ("MIPS: Remove cpu_has_6k_cache and cpu_has_8k_cache in cpu_cache_init()")
> - Add new options: mac2008_only, ftlbparex, gsexcex, mmid, mm_sysad,
>    mm_full
> - Use seq_puts instead of seq_printf as suggested by checkpatch
> - Minor commit message reword
> 
> [0]: https://lore.kernel.org/linux-mips/20181223225224.23042-1-hauke@hauke-m.de/
> Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>

Thanks for taking care of this patch.

Acked-by: Hauke Mehrtens <hauke@hauke-m.de>

> ---
>   arch/mips/kernel/proc.c | 122 ++++++++++++++++++++++++++++++++++++++++
>   1 file changed, 122 insertions(+)
> 
> diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
> index 7d8481d9acc3..376a6e2676e9 100644
> --- a/arch/mips/kernel/proc.c
> +++ b/arch/mips/kernel/proc.c
> @@ -157,6 +157,128 @@ static int show_cpuinfo(struct seq_file *m, void *v)
>   		seq_printf(m, "micromips kernel\t: %s\n",
>   		      (read_c0_config3() & MIPS_CONF3_ISA_OE) ?  "yes" : "no");
>   	}
> +
> +	seq_puts(m, "Options implemented\t:");
> +	if (cpu_has_tlb)
> +		seq_puts(m, " tlb");
> +	if (cpu_has_ftlb)
> +		seq_puts(m, " ftlb");
> +	if (cpu_has_tlbinv)
> +		seq_puts(m, " tlbinv");
> +	if (cpu_has_segments)
> +		seq_puts(m, " segments");
> +	if (cpu_has_rixiex)
> +		seq_puts(m, " rixiex");
> +	if (cpu_has_ldpte)
> +		seq_puts(m, " ldpte");
> +	if (cpu_has_maar)
> +		seq_puts(m, " maar");
> +	if (cpu_has_rw_llb)
> +		seq_puts(m, " rw_llb");
> +	if (cpu_has_4kex)
> +		seq_puts(m, " 4kex");
> +	if (cpu_has_3k_cache)
> +		seq_puts(m, " 3k_cache");
> +	if (cpu_has_4k_cache)
> +		seq_puts(m, " 4k_cache");
> +	if (cpu_has_tx39_cache)
> +		seq_puts(m, " tx39_cache");
> +	if (cpu_has_octeon_cache)
> +		seq_puts(m, " octeon_cache");
> +	if (cpu_has_fpu)
> +		seq_puts(m, " fpu");
> +	if (cpu_has_32fpr)
> +		seq_puts(m, " 32fpr");
> +	if (cpu_has_cache_cdex_p)
> +		seq_puts(m, " cache_cdex_p");
> +	if (cpu_has_cache_cdex_s)
> +		seq_puts(m, " cache_cdex_s");
> +	if (cpu_has_prefetch)
> +		seq_puts(m, " prefetch");
> +	if (cpu_has_mcheck)
> +		seq_puts(m, " mcheck");
> +	if (cpu_has_ejtag)
> +		seq_puts(m, " ejtag");
> +	if (cpu_has_llsc)
> +		seq_puts(m, " llsc");
> +	if (cpu_has_guestctl0ext)
> +		seq_puts(m, " guestctl0ext");
> +	if (cpu_has_guestctl1)
> +		seq_puts(m, " guestctl1");
> +	if (cpu_has_guestctl2)
> +		seq_puts(m, " guestctl2");
> +	if (cpu_has_guestid)
> +		seq_puts(m, " guestid");
> +	if (cpu_has_drg)
> +		seq_puts(m, " drg");
> +	if (cpu_has_rixi)
> +		seq_puts(m, " rixi");
> +	if (cpu_has_lpa)
> +		seq_puts(m, " lpa");
> +	if (cpu_has_mvh)
> +		seq_puts(m, " mvh");
> +	if (cpu_has_vtag_icache)
> +		seq_puts(m, " vtag_icache");
> +	if (cpu_has_dc_aliases)
> +		seq_puts(m, " dc_aliases");
> +	if (cpu_has_ic_fills_f_dc)
> +		seq_puts(m, " ic_fills_f_dc");
> +	if (cpu_has_pindexed_dcache)
> +		seq_puts(m, " pindexed_dcache");
> +	if (cpu_has_userlocal)
> +		seq_puts(m, " userlocal");
> +	if (cpu_has_nofpuex)
> +		seq_puts(m, " nofpuex");
> +	if (cpu_has_vint)
> +		seq_puts(m, " vint");
> +	if (cpu_has_veic)
> +		seq_puts(m, " veic");
> +	if (cpu_has_inclusive_pcaches)
> +		seq_puts(m, " inclusive_pcaches");
> +	if (cpu_has_perf_cntr_intr_bit)
> +		seq_puts(m, " perf_cntr_intr_bit");
> +	if (cpu_has_ufr)
> +		seq_puts(m, " ufr");
> +	if (cpu_has_fre)
> +		seq_puts(m, " fre");
> +	if (cpu_has_cdmm)
> +		seq_puts(m, " cdmm");
> +	if (cpu_has_small_pages)
> +		seq_puts(m, " small_pages");
> +	if (cpu_has_nan_legacy)
> +		seq_puts(m, " nan_legacy");
> +	if (cpu_has_nan_2008)
> +		seq_puts(m, " nan_2008");
> +	if (cpu_has_ebase_wg)
> +		seq_puts(m, " ebase_wg");
> +	if (cpu_has_badinstr)
> +		seq_puts(m, " badinstr");
> +	if (cpu_has_badinstrp)
> +		seq_puts(m, " badinstrp");
> +	if (cpu_has_contextconfig)
> +		seq_puts(m, " contextconfig");
> +	if (cpu_has_perf)
> +		seq_puts(m, " perf");
> +	if (cpu_has_mac2008_only)
> +		seq_puts(m, " mac2008_only");
> +	if (cpu_has_ftlbparex)
> +		seq_puts(m, " ftlbparex");
> +	if (cpu_has_gsexcex)
> +		seq_puts(m, " gsexcex");
> +	if (cpu_has_shared_ftlb_ram)
> +		seq_puts(m, " shared_ftlb_ram");
> +	if (cpu_has_shared_ftlb_entries)
> +		seq_puts(m, " shared_ftlb_entries");
> +	if (cpu_has_mipsmt_pertccounters)
> +		seq_puts(m, " mipsmt_pertccounters");
> +	if (cpu_has_mmid)
> +		seq_puts(m, " mmid");
> +	if (cpu_has_mm_sysad)
> +		seq_puts(m, " mm_sysad");
> +	if (cpu_has_mm_full)
> +		seq_puts(m, " mm_full");
> +	seq_puts(m, "\n");
> +
>   	seq_printf(m, "shadow register sets\t: %d\n",
>   		      cpu_data[n].srsets);
>   	seq_printf(m, "kscratch registers\t: %d\n",
>

diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 7d8481d9acc3..376a6e2676e9 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -157,6 +157,128 @@  static int show_cpuinfo(struct seq_file *m, void *v)
 		seq_printf(m, "micromips kernel\t: %s\n",
 		      (read_c0_config3() & MIPS_CONF3_ISA_OE) ?  "yes" : "no");
 	}
+
+	seq_puts(m, "Options implemented\t:");
+	if (cpu_has_tlb)
+		seq_puts(m, " tlb");
+	if (cpu_has_ftlb)
+		seq_puts(m, " ftlb");
+	if (cpu_has_tlbinv)
+		seq_puts(m, " tlbinv");
+	if (cpu_has_segments)
+		seq_puts(m, " segments");
+	if (cpu_has_rixiex)
+		seq_puts(m, " rixiex");
+	if (cpu_has_ldpte)
+		seq_puts(m, " ldpte");
+	if (cpu_has_maar)
+		seq_puts(m, " maar");
+	if (cpu_has_rw_llb)
+		seq_puts(m, " rw_llb");
+	if (cpu_has_4kex)
+		seq_puts(m, " 4kex");
+	if (cpu_has_3k_cache)
+		seq_puts(m, " 3k_cache");
+	if (cpu_has_4k_cache)
+		seq_puts(m, " 4k_cache");
+	if (cpu_has_tx39_cache)
+		seq_puts(m, " tx39_cache");
+	if (cpu_has_octeon_cache)
+		seq_puts(m, " octeon_cache");
+	if (cpu_has_fpu)
+		seq_puts(m, " fpu");
+	if (cpu_has_32fpr)
+		seq_puts(m, " 32fpr");
+	if (cpu_has_cache_cdex_p)
+		seq_puts(m, " cache_cdex_p");
+	if (cpu_has_cache_cdex_s)
+		seq_puts(m, " cache_cdex_s");
+	if (cpu_has_prefetch)
+		seq_puts(m, " prefetch");
+	if (cpu_has_mcheck)
+		seq_puts(m, " mcheck");
+	if (cpu_has_ejtag)
+		seq_puts(m, " ejtag");
+	if (cpu_has_llsc)
+		seq_puts(m, " llsc");
+	if (cpu_has_guestctl0ext)
+		seq_puts(m, " guestctl0ext");
+	if (cpu_has_guestctl1)
+		seq_puts(m, " guestctl1");
+	if (cpu_has_guestctl2)
+		seq_puts(m, " guestctl2");
+	if (cpu_has_guestid)
+		seq_puts(m, " guestid");
+	if (cpu_has_drg)
+		seq_puts(m, " drg");
+	if (cpu_has_rixi)
+		seq_puts(m, " rixi");
+	if (cpu_has_lpa)
+		seq_puts(m, " lpa");
+	if (cpu_has_mvh)
+		seq_puts(m, " mvh");
+	if (cpu_has_vtag_icache)
+		seq_puts(m, " vtag_icache");
+	if (cpu_has_dc_aliases)
+		seq_puts(m, " dc_aliases");
+	if (cpu_has_ic_fills_f_dc)
+		seq_puts(m, " ic_fills_f_dc");
+	if (cpu_has_pindexed_dcache)
+		seq_puts(m, " pindexed_dcache");
+	if (cpu_has_userlocal)
+		seq_puts(m, " userlocal");
+	if (cpu_has_nofpuex)
+		seq_puts(m, " nofpuex");
+	if (cpu_has_vint)
+		seq_puts(m, " vint");
+	if (cpu_has_veic)
+		seq_puts(m, " veic");
+	if (cpu_has_inclusive_pcaches)
+		seq_puts(m, " inclusive_pcaches");
+	if (cpu_has_perf_cntr_intr_bit)
+		seq_puts(m, " perf_cntr_intr_bit");
+	if (cpu_has_ufr)
+		seq_puts(m, " ufr");
+	if (cpu_has_fre)
+		seq_puts(m, " fre");
+	if (cpu_has_cdmm)
+		seq_puts(m, " cdmm");
+	if (cpu_has_small_pages)
+		seq_puts(m, " small_pages");
+	if (cpu_has_nan_legacy)
+		seq_puts(m, " nan_legacy");
+	if (cpu_has_nan_2008)
+		seq_puts(m, " nan_2008");
+	if (cpu_has_ebase_wg)
+		seq_puts(m, " ebase_wg");
+	if (cpu_has_badinstr)
+		seq_puts(m, " badinstr");
+	if (cpu_has_badinstrp)
+		seq_puts(m, " badinstrp");
+	if (cpu_has_contextconfig)
+		seq_puts(m, " contextconfig");
+	if (cpu_has_perf)
+		seq_puts(m, " perf");
+	if (cpu_has_mac2008_only)
+		seq_puts(m, " mac2008_only");
+	if (cpu_has_ftlbparex)
+		seq_puts(m, " ftlbparex");
+	if (cpu_has_gsexcex)
+		seq_puts(m, " gsexcex");
+	if (cpu_has_shared_ftlb_ram)
+		seq_puts(m, " shared_ftlb_ram");
+	if (cpu_has_shared_ftlb_entries)
+		seq_puts(m, " shared_ftlb_entries");
+	if (cpu_has_mipsmt_pertccounters)
+		seq_puts(m, " mipsmt_pertccounters");
+	if (cpu_has_mmid)
+		seq_puts(m, " mmid");
+	if (cpu_has_mm_sysad)
+		seq_puts(m, " mm_sysad");
+	if (cpu_has_mm_full)
+		seq_puts(m, " mm_full");
+	seq_puts(m, "\n");
+
 	seq_printf(m, "shadow register sets\t: %d\n",
 		      cpu_data[n].srsets);
 	seq_printf(m, "kscratch registers\t: %d\n",

[v2,3/3] MIPS: kernel: proc: add CPU option reporting

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