| Message ID | 20210530171802.23649-4-paul@crapouillou.net (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | fc52f92a653215fbd6bc522ac5311857b335e589 |
| Headers | show |
| Series | Misc Ingenic patches | expand |
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 0ef240adefb5..630fcb4cb30e 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1840,6 +1840,11 @@ static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu) */ case PRID_COMP_INGENIC_D0: c->isa_level &= ~MIPS_CPU_ISA_M32R2; + + /* FPU is not properly detected on JZ4760(B). */ + if (c->processor_id == 0x2ed0024f) + c->options |= MIPS_CPU_FPU; + fallthrough; /*
Ingenic JZ4760 and JZ4760B do have a FPU, but the config registers don't report it. Force the FPU detection in case the processor ID match the JZ4760(B) one. Signed-off-by: Paul Cercueil <paul@crapouillou.net> --- arch/mips/kernel/cpu-probe.c | 5 +++++ 1 file changed, 5 insertions(+)