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[90.40.218.84]) by smtp.gmail.com with ESMTPSA id l23sm17503607wme.22.2021.07.23.01.58.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 23 Jul 2021 01:58:37 -0700 (PDT) From: Christophe Branchereau To: paul@crapouillou.net Cc: jic23@kernel.org, lars@metafoo.de, linux-mips@vger.kernel.org, linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux@roeck-us.net, contact@artur-rojek.eu, Christophe Branchereau Subject: [PATCH V2 4/5] iio/adc: ingenic: add JZ4760B support to the sadc driver Date: Fri, 23 Jul 2021 10:58:12 +0200 Message-Id: <20210723085813.1523934-5-cbranchereau@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210723085813.1523934-1-cbranchereau@gmail.com> References: <893d6165-0f12-d0da-44be-449a4ae96ac2@roeck-us.net> <20210723085813.1523934-1-cbranchereau@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The JZ4760B variant differs slightly from the JZ4760: it has a bit called VBAT_SEL in the CFG register. In order to correctly sample the battery voltage on existing handhelds using this SOC, the bit must be cleared. We leave the possibility to set the bit, by adding the "ingenic,use-internal-divider" property to a devicetree. Signed-off-by: Christophe Branchereau --- drivers/iio/adc/ingenic-adc.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/iio/adc/ingenic-adc.c b/drivers/iio/adc/ingenic-adc.c index 6b9af0530590..09937c05d2af 100644 --- a/drivers/iio/adc/ingenic-adc.c +++ b/drivers/iio/adc/ingenic-adc.c @@ -37,6 +37,7 @@ #define JZ_ADC_REG_CFG_SAMPLE_NUM(n) ((n) << 10) #define JZ_ADC_REG_CFG_PULL_UP(n) ((n) << 16) #define JZ_ADC_REG_CFG_CMD_SEL BIT(22) +#define JZ_ADC_REG_CFG_VBAT_SEL BIT(30) #define JZ_ADC_REG_CFG_TOUCH_OPS_MASK (BIT(31) | GENMASK(23, 10)) #define JZ_ADC_REG_ADCLK_CLKDIV_LSB 0 #define JZ4725B_ADC_REG_ADCLK_CLKDIV10US_LSB 16 @@ -879,6 +880,12 @@ static int ingenic_adc_probe(struct platform_device *pdev) /* Put hardware in a known passive state. */ writeb(0x00, adc->base + JZ_ADC_REG_ENABLE); writeb(0xff, adc->base + JZ_ADC_REG_CTRL); + + if (device_property_present(dev, "ingenic,use-internal-divider")) /* JZ4760B specific */ + ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_VBAT_SEL, JZ_ADC_REG_CFG_VBAT_SEL); + else + ingenic_adc_set_config(adc, JZ_ADC_REG_CFG_VBAT_SEL, 0); + usleep_range(2000, 3000); /* Must wait at least 2ms. */ clk_disable(adc->clk); @@ -906,6 +913,7 @@ static const struct of_device_id ingenic_adc_of_match[] = { { .compatible = "ingenic,jz4725b-adc", .data = &jz4725b_adc_soc_data, }, { .compatible = "ingenic,jz4740-adc", .data = &jz4740_adc_soc_data, }, { .compatible = "ingenic,jz4760-adc", .data = &jz4760_adc_soc_data, }, + { .compatible = "ingenic,jz4760b-adc", .data = &jz4760_adc_soc_data, }, { .compatible = "ingenic,jz4770-adc", .data = &jz4770_adc_soc_data, }, { }, };