diff mbox series

MIPS: ingenic: Unconditionally enable clock of CPU #0

Message ID 20210823173405.153323-1-paul@crapouillou.net (mailing list archive)
State Accepted
Commit 71f8817c28e2e1e5549138e2aef68c2fd784e162
Headers show
Series MIPS: ingenic: Unconditionally enable clock of CPU #0 | expand

Commit Message

Paul Cercueil Aug. 23, 2021, 5:34 p.m. UTC
Make sure that the PLL that feeds the CPU won't be stopped while the
kernel is running.

This fixes a problem on JZ4760 (and probably others) where under very
specific conditions, the main PLL would be turned OFF when the kernel
was shutting down, causing the shutdown process to fail.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
---
 arch/mips/generic/board-ingenic.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

Comments

Thomas Bogendoerfer Aug. 29, 2021, 11:35 a.m. UTC | #1
On Mon, Aug 23, 2021 at 06:34:05PM +0100, Paul Cercueil wrote:
> Make sure that the PLL that feeds the CPU won't be stopped while the
> kernel is running.
> 
> This fixes a problem on JZ4760 (and probably others) where under very
> specific conditions, the main PLL would be turned OFF when the kernel
> was shutting down, causing the shutdown process to fail.
> 
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> ---
>  arch/mips/generic/board-ingenic.c | 28 ++++++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)

applied to mips-next.

Thomas.
diff mbox series

Patch

diff --git a/arch/mips/generic/board-ingenic.c b/arch/mips/generic/board-ingenic.c
index 00161ed4884a..5064cf770d64 100644
--- a/arch/mips/generic/board-ingenic.c
+++ b/arch/mips/generic/board-ingenic.c
@@ -7,6 +7,8 @@ 
  * Copyright (C) 2020 Paul Cercueil <paul@crapouillou.net>
  */
 
+#include <linux/clk.h>
+#include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_fdt.h>
 #include <linux/pm.h>
@@ -114,10 +116,36 @@  static const struct platform_suspend_ops ingenic_pm_ops __maybe_unused = {
 
 static int __init ingenic_pm_init(void)
 {
+	struct device_node *cpu_node;
+	struct clk *cpu0_clk;
+	int ret;
+
 	if (boot_cpu_type() == CPU_XBURST) {
 		if (IS_ENABLED(CONFIG_PM_SLEEP))
 			suspend_set_ops(&ingenic_pm_ops);
 		_machine_halt = ingenic_halt;
+
+		/*
+		 * Unconditionally enable the clock for the first CPU.
+		 * This makes sure that the PLL that feeds the CPU won't be
+		 * stopped while the kernel is running.
+		 */
+		cpu_node = of_get_cpu_node(0, NULL);
+		if (!cpu_node) {
+			pr_err("Unable to get CPU node\n");
+		} else {
+			cpu0_clk = of_clk_get(cpu_node, 0);
+			if (IS_ERR(cpu0_clk)) {
+				pr_err("Unable to get CPU0 clock\n");
+				return PTR_ERR(cpu0_clk);
+			}
+
+			ret = clk_prepare_enable(cpu0_clk);
+			if (ret) {
+				pr_err("Unable to enable CPU0 clock\n");
+				return ret;
+			}
+		}
 	}
 
 	return 0;