| Message ID | 20220128230922.2047140-3-j.neuschaefer@gmx.net (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | None | expand |
On Mon, Jan 31, 2022 at 12:48 PM Jonathan Neuschäfer <j.neuschaefer@gmx.net> wrote: > > In order that the end of a clk_div_table can be detected, it must be > terminated with a sentinel element (.div = 0). > > Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> > --- > drivers/clk/loongson1/clk-loongson1c.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/clk/loongson1/clk-loongson1c.c b/drivers/clk/loongson1/clk-loongson1c.c > index 703f87622cf5f..6b29ae9ede3e5 100644 > --- a/drivers/clk/loongson1/clk-loongson1c.c > +++ b/drivers/clk/loongson1/clk-loongson1c.c > @@ -37,6 +37,7 @@ static const struct clk_div_table ahb_div_table[] = { > [1] = { .val = 1, .div = 4 }, > [2] = { .val = 2, .div = 3 }, > [3] = { .val = 3, .div = 3 }, > + [4] = { .val = 0, .div = 0 }, Easier to review when self-explicit: [4] = { /* sentinel */ } Preferably updated: Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> And eventually: Fixes: b4626a7f4892 ("CLK: Add Loongson1C clock support") > }; > > void __init ls1x_clk_init(void) > -- > 2.34.1 >
On Tue, Feb 01, 2022 at 02:57:03PM +0100, Philippe Mathieu-Daudé wrote: > On Mon, Jan 31, 2022 at 12:48 PM Jonathan Neuschäfer > <j.neuschaefer@gmx.net> wrote: > > > > In order that the end of a clk_div_table can be detected, it must be > > terminated with a sentinel element (.div = 0). > > > > Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> > > --- > > drivers/clk/loongson1/clk-loongson1c.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/clk/loongson1/clk-loongson1c.c b/drivers/clk/loongson1/clk-loongson1c.c > > index 703f87622cf5f..6b29ae9ede3e5 100644 > > --- a/drivers/clk/loongson1/clk-loongson1c.c > > +++ b/drivers/clk/loongson1/clk-loongson1c.c > > @@ -37,6 +37,7 @@ static const struct clk_div_table ahb_div_table[] = { > > [1] = { .val = 1, .div = 4 }, > > [2] = { .val = 2, .div = 3 }, > > [3] = { .val = 3, .div = 3 }, > > + [4] = { .val = 0, .div = 0 }, > > Easier to review when self-explicit: > > [4] = { /* sentinel */ } > > Preferably updated: > Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > > And eventually: > Fixes: b4626a7f4892 ("CLK: Add Loongson1C clock support") All good suggestions, I'll incorporate them into v2. Thanks, Jonathan
diff --git a/drivers/clk/loongson1/clk-loongson1c.c b/drivers/clk/loongson1/clk-loongson1c.c index 703f87622cf5f..6b29ae9ede3e5 100644 --- a/drivers/clk/loongson1/clk-loongson1c.c +++ b/drivers/clk/loongson1/clk-loongson1c.c @@ -37,6 +37,7 @@ static const struct clk_div_table ahb_div_table[] = { [1] = { .val = 1, .div = 4 }, [2] = { .val = 2, .div = 3 }, [3] = { .val = 3, .div = 3 }, + [4] = { .val = 0, .div = 0 }, }; void __init ls1x_clk_init(void)
In order that the end of a clk_div_table can be detected, it must be terminated with a sentinel element (.div = 0). Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> --- drivers/clk/loongson1/clk-loongson1c.c | 1 + 1 file changed, 1 insertion(+) -- 2.34.1