diff mbox series

[v2] mips: DEC: honor CONFIG_MIPS_FP_SUPPORT=n

Message ID 20220304161036.16008-1-rdunlap@infradead.org (mailing list archive)
State Superseded
Headers show
Series [v2] mips: DEC: honor CONFIG_MIPS_FP_SUPPORT=n | expand

Commit Message

Randy Dunlap March 4, 2022, 4:10 p.m. UTC 
Include the DECstation interrupt handler in opting out of
FPU support.

Fixes a linker error:

mips-linux-ld: arch/mips/dec/int-handler.o: in function `fpu':
(.text+0x148): undefined reference to `handle_fpe_int'

Fixes: 183b40f992c8 ("MIPS: Allow FP support to be disabled")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: kernel test robot <lkp@intel.com>
Cc: Paul Burton <paulburton@kernel.org>
Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Maciej W. Rozycki <macro@orcam.me.uk>
Cc: linux-mips@vger.kernel.org
---
v2: add another ifdef block in int-handler.S; (Maciej)
    add an ifdef block in dec/setup.c; (Maciej)

 arch/mips/dec/int-handler.S |    6 +++---
 arch/mips/dec/setup.c       |    2 ++
 2 files changed, 5 insertions(+), 3 deletions(-)

Comments

Maciej W. Rozycki March 4, 2022, 4:17 p.m. UTC | #1 
On Fri, 4 Mar 2022, Randy Dunlap wrote:

> --- linux-next-20220303.orig/arch/mips/dec/setup.c
> +++ linux-next-20220303/arch/mips/dec/setup.c
> @@ -746,6 +746,7 @@ void __init arch_init_irq(void)
>  		dec_interrupt[DEC_IRQ_HALT] = -1;
>  
>  	/* Register board interrupts: FPU and cascade. */
> +#if defined(CONFIG_MIPS_FP_SUPPORT)
>  	if (dec_interrupt[DEC_IRQ_FPU] >= 0 && cpu_has_fpu) {
>  		struct irq_desc *desc_fpu;
>  		int irq_fpu;

 Can you please make it:

	if (IS_ENABLED(CONFIG_MIPS_FP_SUPPORT) && 
	    dec_interrupt[DEC_IRQ_FPU] >= 0 && cpu_has_fpu) {

so as not to add more #ifdef's where avoidable?

  Maciej
diff mbox series

Patch

--- linux-next-20220303.orig/arch/mips/dec/int-handler.S
+++ linux-next-20220303/arch/mips/dec/int-handler.S
@@ -131,7 +131,7 @@ 
 		 */
 		mfc0	t0,CP0_CAUSE		# get pending interrupts
 		mfc0	t1,CP0_STATUS
-#ifdef CONFIG_32BIT
+#if defined(CONFIG_32BIT) && defined(CONFIG_MIPS_FP_SUPPORT)
 		lw	t2,cpu_fpu_mask
 #endif
 		andi	t0,ST0_IM		# CAUSE.CE may be non-zero!
@@ -139,7 +139,7 @@ 
 
 		beqz	t0,spurious
 
-#ifdef CONFIG_32BIT
+#if defined(CONFIG_32BIT) && defined(CONFIG_MIPS_FP_SUPPORT)
 		 and	t2,t0
 		bnez	t2,fpu			# handle FPU immediately
 #endif
@@ -280,7 +280,7 @@  handle_it:
 		j	dec_irq_dispatch
 		 nop
 
-#ifdef CONFIG_32BIT
+#if defined(CONFIG_32BIT) && defined(CONFIG_MIPS_FP_SUPPORT)
 fpu:
 		lw	t0,fpu_kstat_irq
 		nop
--- linux-next-20220303.orig/arch/mips/dec/setup.c
+++ linux-next-20220303/arch/mips/dec/setup.c
@@ -746,6 +746,7 @@  void __init arch_init_irq(void)
 		dec_interrupt[DEC_IRQ_HALT] = -1;
 
 	/* Register board interrupts: FPU and cascade. */
+#if defined(CONFIG_MIPS_FP_SUPPORT)
 	if (dec_interrupt[DEC_IRQ_FPU] >= 0 && cpu_has_fpu) {
 		struct irq_desc *desc_fpu;
 		int irq_fpu;
@@ -757,6 +758,7 @@  void __init arch_init_irq(void)
 		desc_fpu = irq_to_desc(irq_fpu);
 		fpu_kstat_irq = this_cpu_ptr(desc_fpu->kstat_irqs);
 	}
+#endif
 	if (dec_interrupt[DEC_IRQ_CASCADE] >= 0) {
 		if (request_irq(dec_interrupt[DEC_IRQ_CASCADE], no_action,
 				IRQF_NO_THREAD, "cascade", NULL))