From patchwork Tue Apr 19 11:16:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jason A. Donenfeld" X-Patchwork-Id: 12817843 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ADF71C433EF for ; Tue, 19 Apr 2022 11:18:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351131AbiDSLVS (ORCPT ); Tue, 19 Apr 2022 07:21:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49176 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351090AbiDSLVB (ORCPT ); Tue, 19 Apr 2022 07:21:01 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 78CEF31343; Tue, 19 Apr 2022 04:17:55 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 31458B8184C; Tue, 19 Apr 2022 11:17:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 93224C385A7; Tue, 19 Apr 2022 11:17:49 +0000 (UTC) Authentication-Results: smtp.kernel.org; dkim=pass (1024-bit key) header.d=zx2c4.com header.i=@zx2c4.com header.b="SxcYjTew" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=zx2c4.com; s=20210105; t=1650367068; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=GyVqPK6Q2l0aWoffrsnv0agQDlKeoAODOGjkQidyGrU=; b=SxcYjTewAhNT361J2u3/vSVMAJYFfrAL5IzQLXL2vspuiKtjiYlzKJjDIWpbXHR2qfWyDc qeNiTj45aAgJWQNm9tmUO7FxKCrt9DXJ7YNt5NlB0NQ5DIUPeVr0+df75lFBlD+NgwNT8t TAhC6xo1bxAPzeij58zS8hasRpJirtk= Received: by mail.zx2c4.com (ZX2C4 Mail Server) with ESMTPSA id fd07d0b6 (TLSv1.3:AEAD-AES256-GCM-SHA384:256:NO); Tue, 19 Apr 2022 11:17:48 +0000 (UTC) From: "Jason A. Donenfeld" To: linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org, tglx@linutronix.de, arnd@arndb.de Cc: "Jason A. Donenfeld" , Theodore Ts'o , Dominik Brodowski , Russell King , Catalin Marinas , Will Deacon , Geert Uytterhoeven , Thomas Bogendoerfer , Paul Walmsley , Palmer Dabbelt , Albert Ou , "David S . Miller" , Richard Weinberger , Anton Ivanov , Johannes Berg , Ingo Molnar , Borislav Petkov , Dave Hansen , "H . Peter Anvin" , Chris Zankel , Max Filippov , Stephen Boyd , Dinh Nguyen , linux-arm-kernel@lists.infradead.org, linux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org, linux-riscv@lists.infradead.org, sparclinux@vger.kernel.org, linux-um@lists.infradead.org, x86@kernel.org, linux-xtensa@linux-xtensa.org, "Maciej W . Rozycki" Subject: [PATCH v5 04/11] mips: use fallback for random_get_entropy() instead of just c0 random Date: Tue, 19 Apr 2022 13:16:43 +0200 Message-Id: <20220419111650.1582274-5-Jason@zx2c4.com> In-Reply-To: <20220419111650.1582274-1-Jason@zx2c4.com> References: <20220419111650.1582274-1-Jason@zx2c4.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org For situations in which we don't have a c0 counter register available, we've been falling back to reading the c0 "random" register, which is usually bounded by the amount of TLB entries and changes every other cycle or so. This means it wraps extremely often. We can do better by combining this fast-changing counter with a potentially slower-changing counter from random_get_entropy_fallback() in the more significant bits. This commit combines the two, taking into account that the changing bits are in a different bit position depending on the CPU model. In addition, we previously were falling back to 0 for ancient CPUs that Linux does not support anyway; remove that dead path entirely. Cc: Thomas Gleixner Cc: Arnd Bergmann Cc: Thomas Bogendoerfer Cc: Maciej W. Rozycki Signed-off-by: Jason A. Donenfeld Tested-by: Maciej W. Rozycki Acked-by: Thomas Bogendoerfer --- ThomasB - I dropped your Ack from v4, because this is pretty different from v4 now. Maciej - you mentioned you had a test rig. Think you could provide a "Tested-by" if this approach works? arch/mips/include/asm/timex.h | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/arch/mips/include/asm/timex.h b/arch/mips/include/asm/timex.h index b05bb70a2e46..e3f5460a923b 100644 --- a/arch/mips/include/asm/timex.h +++ b/arch/mips/include/asm/timex.h @@ -80,21 +80,19 @@ static inline cycles_t get_cycles(void) /* * Like get_cycles - but where c0_count is not available we desperately * use c0_random in an attempt to get at least a little bit of entropy. - * - * R6000 and R6000A neither have a count register nor a random register. - * That leaves no entropy source in the CPU itself. */ static inline unsigned long random_get_entropy(void) { - unsigned int prid = read_c0_prid(); - unsigned int imp = prid & PRID_IMP_MASK; + unsigned int c0_random; - if (can_use_mips_counter(prid)) + if (can_use_mips_counter(read_c0_prid())) return read_c0_count(); - else if (likely(imp != PRID_IMP_R6000 && imp != PRID_IMP_R6000A)) - return read_c0_random(); + + if (cpu_has_3kex) + c0_random = (read_c0_random() >> 8) & 0x3f; else - return 0; /* no usable register */ + c0_random = read_c0_random() & 0x3f; + return (random_get_entropy_fallback() << 6) | (0x3f - c0_random); } #define random_get_entropy random_get_entropy