diff mbox series

mips: bmips: bcm63268: add TWD block binding

Message ID 20220914091045.29488-1-zajec5@gmail.com (mailing list archive)
State Accepted
Commit b971612cc193b524b554fe53821f4dbb2a774c01
Headers show
Series mips: bmips: bcm63268: add TWD block binding | expand

Commit Message

Rafał Miłecki Sept. 14, 2022, 9:10 a.m. UTC 
From: Rafał Miłecki <rafal@milecki.pl>

TWD is an MFD block that contains timers, watchdog & some clocks / reset
controller.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
It's the same patch as in the
[PATCH RFC RFT] mips: bmips: bcm63268: add TWD block binding
(sent back in January)
---
 arch/mips/boot/dts/brcm/bcm63268.dtsi | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

Comments

Thomas Bogendoerfer Sept. 19, 2022, 2:48 p.m. UTC | #1 
On Wed, Sep 14, 2022 at 11:10:45AM +0200, Rafał Miłecki wrote:
> From: Rafał Miłecki <rafal@milecki.pl>
> 
> TWD is an MFD block that contains timers, watchdog & some clocks / reset
> controller.
> 
> Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
> ---
> It's the same patch as in the
> [PATCH RFC RFT] mips: bmips: bcm63268: add TWD block binding
> (sent back in January)
> ---
>  arch/mips/boot/dts/brcm/bcm63268.dtsi | 18 ++++++++++++------
>  1 file changed, 12 insertions(+), 6 deletions(-)

applied to mips-next.

Thomas.
diff mbox series

Patch

diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi
index c3ce49ec675f..8926417a8fbc 100644
--- a/arch/mips/boot/dts/brcm/bcm63268.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi
@@ -105,14 +105,20 @@  periph_intc: interrupt-controller@10000020 {
 			interrupts = <2>, <3>;
 		};
 
-		wdt: watchdog@1000009c {
-			compatible = "brcm,bcm7038-wdt";
-			reg = <0x1000009c 0xc>;
+		timer-mfd@10000080 {
+			compatible = "brcm,bcm7038-twd", "simple-mfd", "syscon";
+			reg = <0x10000080 0x30>;
+			ranges = <0x0 0x10000080 0x30>;
 
-			clocks = <&periph_osc>;
-			clock-names = "refclk";
+			wdt: watchdog@1c {
+				compatible = "brcm,bcm7038-wdt";
+				reg = <0x1c 0xc>;
 
-			timeout-sec = <30>;
+				clocks = <&periph_osc>;
+				clock-names = "refclk";
+
+				timeout-sec = <30>;
+			};
 		};
 
 		uart0: serial@10000180 {