From patchwork Fri Mar 3 00:28:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= X-Patchwork-Id: 13158131 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9434CC7EE43 for ; Fri, 3 Mar 2023 00:30:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230099AbjCCAao (ORCPT ); Thu, 2 Mar 2023 19:30:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41910 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230005AbjCCAaj (ORCPT ); Thu, 2 Mar 2023 19:30:39 -0500 Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E40D659E4F; Thu, 2 Mar 2023 16:30:18 -0800 (PST) Received: by mail-lj1-x230.google.com with SMTP id a32so738610ljr.9; Thu, 02 Mar 2023 16:30:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; t=1677803414; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nIZ/VUwLQr0Tb6Hs8t6RcaxxMgXGsFSSH+ZFsM+YJEg=; b=aR/StYwg5SBRBhvvub54pAY0m0Dak5Vqi1Sn2vYzdDBLtdMkvWTrVCM/lqdvz9Douo FLDnxFfjNFng+q5UzRjBPEr8i41m8tlHvyE27SMFOwoC/s9ubhYRXgs9G5NWy9s/32pF 4Wk73BnGAY2AXdu8/25JjMiA35UqkYAPoXYcew2afGVkltta25e4cQMBjhNMdoVjn+Hd lN0b4j1dsy2JzVqfR4nGNkHRDA3IXpIWWHWjB/i7gq3f5IEVnfzWqzU0GJiLo69EPQd/ vp/RxMjmN3By5gPM7cptGrJaKEwnTN9zlGh2PuKUSk9MiRpbWujrdsyoVyNww7m5qpb4 9YBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1677803414; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nIZ/VUwLQr0Tb6Hs8t6RcaxxMgXGsFSSH+ZFsM+YJEg=; b=qlrYNKxRf8WSdI962Y/dn8FoCnvyxGJ1kT5x8UGJJGK/qluqrf84dRcXeuXNK2H4MN Q/pnK6sZpERdH65m8nsl0YokHy2+/ENL3IRQWYuOo8ss8sW7m9zd1joqOP4/GktSIm9D p/1G8M3Ttp0zuonH4QfqavQ1rzbhTunM85Hu9+wRcQ3V5fyRnv4zd7epouQFyVKteMN8 oMEUjmSsRZ4PCebeiIon0p95rXF3V9SE8Y7QSp1TL2u23mJBPUNx21Cj7foxXnbzN9OO JoEUMTHDdmNrQookxvVKa86lG/j7+oXYtKhT/UfJsqjYx+En0DUOVEsZh9ve7qxsUe5b zC7g== X-Gm-Message-State: AO0yUKVgle+bPkN+Nv3MoInbcc/KjhDRj/8FiAVBsRxXa+yHQaC39/rG doAIgWlBO8B0029TTQ4ztx0= X-Google-Smtp-Source: AK7set83k4MFsUVGzmCNJxxP1R5E6lqPSIHxrZtWDUwPEtDs/ZH+jWGM6ooYBuPE7QUickUieSdq6A== X-Received: by 2002:a2e:870d:0:b0:290:6e01:8d0b with SMTP id m13-20020a2e870d000000b002906e018d0bmr3245766lji.26.1677803413992; Thu, 02 Mar 2023 16:30:13 -0800 (PST) Received: from arinc9-PC.lan ([212.68.60.226]) by smtp.gmail.com with ESMTPSA id v19-20020a2e9f53000000b002932b817990sm64901ljk.31.2023.03.02.16.30.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Mar 2023 16:30:13 -0800 (PST) From: arinc9.unal@gmail.com X-Google-Original-From: arinc.unal@arinc9.com To: Linus Walleij , Rob Herring , Krzysztof Kozlowski Cc: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= , linux-mediatek@lists.infradead.org, linux-mips@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Sergio Paracuellos , Matthias Brugger , Sean Wang , William Dean , Daniel Golle , Daniel Santos , Luiz Angelo Daros de Luca , Frank Wunderlich , Landen Chao , DENG Qingfang , Sean Wang , erkin.bozoglu@xeront.com Subject: [PATCH 09/20] dt-bindings: pinctrl: ralink: {mt7620,mt7621}: rename to mediatek Date: Fri, 3 Mar 2023 03:28:38 +0300 Message-Id: <20230303002850.51858-10-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20230303002850.51858-1-arinc.unal@arinc9.com> References: <20230303002850.51858-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org From: Arınç ÜNAL This platform from Ralink was acquired by MediaTek in 2011. Then, MediaTek introduced these SoCs which utilise this platform. Rename the schemas to mediatek to address the incorrect naming. Signed-off-by: Arınç ÜNAL --- ...ink,mt7620-pinctrl.yaml => mediatek,mt7620-pinctrl.yaml} | 6 +++--- ...ink,mt7621-pinctrl.yaml => mediatek,mt7621-pinctrl.yaml} | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) rename Documentation/devicetree/bindings/pinctrl/{ralink,mt7620-pinctrl.yaml => mediatek,mt7620-pinctrl.yaml} (98%) rename Documentation/devicetree/bindings/pinctrl/{ralink,mt7621-pinctrl.yaml => mediatek,mt7621-pinctrl.yaml} (97%) diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml similarity index 98% rename from Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml rename to Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml index a94d2e7a5f37..1c9ca0bf9750 100644 --- a/Documentation/devicetree/bindings/pinctrl/ralink,mt7620-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7620-pinctrl.yaml @@ -1,17 +1,17 @@ # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- -$id: http://devicetree.org/schemas/pinctrl/ralink,mt7620-pinctrl.yaml# +$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7620-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Ralink MT7620 Pin Controller +title: MediaTek MT7620 Pin Controller maintainers: - Arınç ÜNAL - Sergio Paracuellos description: - Ralink MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs. + MediaTek MT7620 pin controller for MT7620, MT7628 and MT7688 SoCs. The pin controller can only set the muxing of pin groups. Muxing individual pins is not supported. There is no pinconf support. diff --git a/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml similarity index 97% rename from Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml rename to Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml index eb0746cfc6d6..717c948951be 100644 --- a/Documentation/devicetree/bindings/pinctrl/ralink,mt7621-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/mediatek,mt7621-pinctrl.yaml @@ -1,17 +1,17 @@ # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- -$id: http://devicetree.org/schemas/pinctrl/ralink,mt7621-pinctrl.yaml# +$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7621-pinctrl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Ralink MT7621 Pin Controller +title: MediaTek MT7621 Pin Controller maintainers: - Arınç ÜNAL - Sergio Paracuellos description: - Ralink MT7621 pin controller for MT7621 SoC. + MediaTek MT7621 pin controller for MT7621 SoC. The pin controller can only set the muxing of pin groups. Muxing individual pins is not supported. There is no pinconf support.