| Message ID | 20230321104852.25284-2-jiaxun.yang@flygoat.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | MIPS Virt board support | expand |
On Tue, Mar 21, 2023 at 10:48:41AM +0000, Jiaxun Yang wrote: > bcache is not tied to CPU's cache interface. Just move those > declaration to cache.c so it can be avaialble to CPU with all > cache types. > > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> > --- > arch/mips/mm/c-r4k.c | 14 -------------- > arch/mips/mm/cache.c | 17 +++++++++++++++++ > 2 files changed, 17 insertions(+), 14 deletions(-) > > diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c > index a549fa98c2f4..fd660d5c5328 100644 > --- a/arch/mips/mm/c-r4k.c > +++ b/arch/mips/mm/c-r4k.c > @@ -110,20 +110,6 @@ static unsigned long dcache_size __read_mostly; > static unsigned long vcache_size __read_mostly; > static unsigned long scache_size __read_mostly; > > -/* > - * Dummy cache handling routines for machines without boardcaches > - */ > -static void cache_noop(void) {} /local/tbogendoerfer/korg/linux/arch/mips/mm/c-r4k.c: In function ‘r4k_blast_dcache_page_setup’: /local/tbogendoerfer/korg/linux/arch/mips/mm/c-r4k.c:149:35: error: ‘cache_noop’ undeclared (first use in this function) r4k_blast_dcache_page = (void *)cache_noop; ^~~~~~~~~~ looks like you haven't compiled this for other board configs. Thomas.
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index a549fa98c2f4..fd660d5c5328 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -110,20 +110,6 @@ static unsigned long dcache_size __read_mostly; static unsigned long vcache_size __read_mostly; static unsigned long scache_size __read_mostly; -/* - * Dummy cache handling routines for machines without boardcaches - */ -static void cache_noop(void) {} - -static struct bcache_ops no_sc_ops = { - .bc_enable = (void *)cache_noop, - .bc_disable = (void *)cache_noop, - .bc_wback_inv = (void *)cache_noop, - .bc_inv = (void *)cache_noop -}; - -struct bcache_ops *bcops = &no_sc_ops; - #define cpu_is_r4600_v1_x() ((read_c0_prid() & 0xfffffff0) == 0x00002010) #define cpu_is_r4600_v2_x() ((read_c0_prid() & 0xfffffff0) == 0x00002020) diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c index 11b3e7ddafd5..25cedd6ee572 100644 --- a/arch/mips/mm/cache.c +++ b/arch/mips/mm/cache.c @@ -17,6 +17,7 @@ #include <linux/highmem.h> #include <linux/pagemap.h> +#include <asm/bcache.h> #include <asm/cacheflush.h> #include <asm/processor.h> #include <asm/cpu.h> @@ -56,6 +57,22 @@ EXPORT_SYMBOL_GPL(local_flush_data_cache_page); EXPORT_SYMBOL(flush_data_cache_page); EXPORT_SYMBOL(flush_icache_all); +#ifdef CONFIG_BOARD_SCACHE +/* + * Dummy cache handling routines for machines without boardcaches + */ +static void cache_noop(void) {} + +static struct bcache_ops no_sc_ops = { + .bc_enable = (void *)cache_noop, + .bc_disable = (void *)cache_noop, + .bc_wback_inv = (void *)cache_noop, + .bc_inv = (void *)cache_noop +}; + +struct bcache_ops *bcops = &no_sc_ops; +#endif + #ifdef CONFIG_DMA_NONCOHERENT /* DMA cache operations. */
bcache is not tied to CPU's cache interface. Just move those declaration to cache.c so it can be avaialble to CPU with all cache types. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> --- arch/mips/mm/c-r4k.c | 14 -------------- arch/mips/mm/cache.c | 17 +++++++++++++++++ 2 files changed, 17 insertions(+), 14 deletions(-)