Message ID | 20230327121317.4081816-11-arnd@kernel.org (mailing list archive) |
---|---|
State | Handled Elsewhere |
Headers | show |
Series | dma-mapping: unify support for cache flushes | expand |
On Mon, Mar 27, 2023 at 8:15 PM Arnd Bergmann <arnd@kernel.org> wrote: > > From: Arnd Bergmann <arnd@arndb.de> > > csky is the only architecture that does a full flush for the > dma_sync_*_for_device(..., DMA_FROM_DEVICE) operation. The requirement > is only make sure there are no dirty cache lines for the buffer, > which can be either done through an invalidate operation (as on most > architectures including arm32, mips and arc), or a writeback (as on > arm64 and riscv). The cache also has to be invalidated eventually but > csky already does that after the transfer. > > Use a 'clean' operation here for consistency with arm64 and riscv. > > Signed-off-by: Arnd Bergmann <arnd@arndb.de> > --- > arch/csky/mm/dma-mapping.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/arch/csky/mm/dma-mapping.c b/arch/csky/mm/dma-mapping.c > index 82447029feb4..c90f912e2822 100644 > --- a/arch/csky/mm/dma-mapping.c > +++ b/arch/csky/mm/dma-mapping.c > @@ -60,11 +60,9 @@ void arch_sync_dma_for_device(phys_addr_t paddr, size_t size, > { > switch (dir) { > case DMA_TO_DEVICE: > - cache_op(paddr, size, dma_wb_range); > - break; > case DMA_FROM_DEVICE: > case DMA_BIDIRECTIONAL: > - cache_op(paddr, size, dma_wbinv_range); > + cache_op(paddr, size, dma_wb_range); Reviewed-by: Guo Ren <guoren@kernel.org> > break; > default: > BUG(); > -- > 2.39.2 >
diff --git a/arch/csky/mm/dma-mapping.c b/arch/csky/mm/dma-mapping.c index 82447029feb4..c90f912e2822 100644 --- a/arch/csky/mm/dma-mapping.c +++ b/arch/csky/mm/dma-mapping.c @@ -60,11 +60,9 @@ void arch_sync_dma_for_device(phys_addr_t paddr, size_t size, { switch (dir) { case DMA_TO_DEVICE: - cache_op(paddr, size, dma_wb_range); - break; case DMA_FROM_DEVICE: case DMA_BIDIRECTIONAL: - cache_op(paddr, size, dma_wbinv_range); + cache_op(paddr, size, dma_wb_range); break; default: BUG();