| Message ID | 20230414080701.15503-8-jiaxun.yang@flygoat.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 74efddad96fb37f66906850da0ab9cca59446e49 |
| Headers | show |
| Series | MIPS: LLVM toolchain support for more CPUs | expand |
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 2374f859e001..a61f860771e2 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -2194,7 +2194,8 @@ config CPU_R4K_CACHE_TLB config MIPS_MT_SMP bool "MIPS MT SMP support (1 TC on each available VPE)" default y - depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS + depends on TARGET_ISA_REV > 0 && TARGET_ISA_REV < 6 + depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MICROMIPS select CPU_MIPSR2_IRQ_VI select CPU_MIPSR2_IRQ_EI select SYNC_R4K
MIPS MT ASE is only available on ISA between Release 1 and Release 5. Add ISA level dependency to Kconfig to fix build. Reported-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> --- arch/mips/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)