From patchwork Tue May 9 20:00:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liviu Dudau X-Patchwork-Id: 13236117 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83E21C7EE22 for ; Tue, 9 May 2023 20:10:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229549AbjEIUKC (ORCPT ); Tue, 9 May 2023 16:10:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47848 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229498AbjEIUKB (ORCPT ); Tue, 9 May 2023 16:10:01 -0400 X-Greylist: delayed 560 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Tue, 09 May 2023 13:10:00 PDT Received: from smtp.dudau.co.uk (dliviu.plus.com [80.229.23.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 841CACF; Tue, 9 May 2023 13:10:00 -0700 (PDT) Received: from mail.dudau.co.uk (bart.dudau.co.uk [192.168.14.2]) by smtp.dudau.co.uk (Postfix) with SMTP id 03D5741D13BF; Tue, 9 May 2023 21:00:38 +0100 (BST) Received: by mail.dudau.co.uk (sSMTP sendmail emulation); Tue, 09 May 2023 21:00:38 +0100 From: Liviu Dudau To: =?utf-8?b?QXLEsW7DpyDDnE5BTA==?= Cc: Thomas Bogendoerfer , Paul Burton , Rob Herring , Sergio Paracuellos , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Liviu Dudau Subject: [PATCH] mips: dts: ralink: Clarify usage of MT7621 ethernet phy arguments Date: Tue, 9 May 2023 21:00:32 +0100 Message-Id: <20230509200032.308934-1-liviu@dudau.co.uk> X-Mailer: git-send-email 2.40.0 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org The device tree uses numbers as arguments to the phys property that are confusing for newcomers. Define names for the values and use them in the device tree. Signed-off-by: Liviu Dudau --- arch/mips/boot/dts/ralink/mt7621.dtsi | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi index 7caed0d14f11a..1c584b6d0e1fa 100644 --- a/arch/mips/boot/dts/ralink/mt7621.dtsi +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi @@ -4,6 +4,9 @@ #include #include +#define DUAL_PORT 1 +#define SINGLE_PORT 0 + / { #address-cells = <1>; #size-cells = <1>; @@ -455,7 +458,7 @@ pcie@0,0 { interrupt-map = <0 0 0 0 &gic GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>; resets = <&sysc MT7621_RST_PCIE0>; clocks = <&sysc MT7621_CLK_PCIE0>; - phys = <&pcie0_phy 1>; + phys = <&pcie0_phy DUAL_PORT>; phy-names = "pcie-phy0"; ranges; }; @@ -470,7 +473,7 @@ pcie@1,0 { interrupt-map = <0 0 0 0 &gic GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>; resets = <&sysc MT7621_RST_PCIE1>; clocks = <&sysc MT7621_CLK_PCIE1>; - phys = <&pcie0_phy 1>; + phys = <&pcie0_phy DUAL_PORT>; phy-names = "pcie-phy1"; ranges; }; @@ -485,7 +488,7 @@ pcie@2,0 { interrupt-map = <0 0 0 0 &gic GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>; resets = <&sysc MT7621_RST_PCIE2>; clocks = <&sysc MT7621_CLK_PCIE2>; - phys = <&pcie2_phy 0>; + phys = <&pcie2_phy SINGLE_PORT>; phy-names = "pcie-phy2"; ranges; };