diff mbox series

MIPS: Loongson: Fix cpu_probe_loongson() again

Message ID 20230626075014.1872632-1-chenhuacai@loongson.cn (mailing list archive)
State Accepted
Commit 65fee014dc41a774bcd94896f3fb380bc39d8dda
Headers show
Series MIPS: Loongson: Fix cpu_probe_loongson() again | expand

Commit Message

Huacai Chen June 26, 2023, 7:50 a.m. UTC
Commit 7db5e9e9e5e6c10d7d ("MIPS: loongson64: fix FTLB configuration")
move decode_configs() from the beginning of cpu_probe_loongson() to the
end in order to fix FTLB configuration. However, it breaks the CPUCFG
decoding because decode_configs() use "c->options = xxxx" rather than
"c->options |= xxxx", all information get from CPUCFG by decode_cpucfg()
is lost.

This causes error when creating a KVM guest on Loongson-3A4000:
Exception Code: 4 not handled @ PC: 0000000087ad5981, inst: 0xcb7a1898 BadVaddr: 0x0 Status: 0x0

Fix this by moving the c->cputype setting to the beginning and moving
decode_configs() after that.

Fixes: 7db5e9e9e5e6c10d7d ("MIPS: loongson64: fix FTLB configuration")
Cc: stable@vger.kernel.org
Cc: Huang Pei <huangpei@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
---
 arch/mips/kernel/cpu-probe.c | 9 +++------
 1 file changed, 3 insertions(+), 6 deletions(-)

Comments

Thomas Bogendoerfer July 3, 2023, 2:09 p.m. UTC | #1
On Mon, Jun 26, 2023 at 03:50:14PM +0800, Huacai Chen wrote:
> Commit 7db5e9e9e5e6c10d7d ("MIPS: loongson64: fix FTLB configuration")
> move decode_configs() from the beginning of cpu_probe_loongson() to the
> end in order to fix FTLB configuration. However, it breaks the CPUCFG
> decoding because decode_configs() use "c->options = xxxx" rather than
> "c->options |= xxxx", all information get from CPUCFG by decode_cpucfg()
> is lost.
> 
> This causes error when creating a KVM guest on Loongson-3A4000:
> Exception Code: 4 not handled @ PC: 0000000087ad5981, inst: 0xcb7a1898 BadVaddr: 0x0 Status: 0x0
> 
> Fix this by moving the c->cputype setting to the beginning and moving
> decode_configs() after that.
> 
> Fixes: 7db5e9e9e5e6c10d7d ("MIPS: loongson64: fix FTLB configuration")
> Cc: stable@vger.kernel.org
> Cc: Huang Pei <huangpei@loongson.cn>
> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
> ---
>  arch/mips/kernel/cpu-probe.c | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)

applied to mips-next.

Thomas.
Maciej W. Rozycki July 17, 2023, 10:28 p.m. UTC | #2
On Mon, 26 Jun 2023, Huacai Chen wrote:

> diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
> index e79adcb128e6..b406d8bfb15a 100644
> --- a/arch/mips/kernel/cpu-probe.c
> +++ b/arch/mips/kernel/cpu-probe.c
> @@ -1677,7 +1677,10 @@ static inline void decode_cpucfg(struct cpuinfo_mips *c)
>  
>  static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
>  {
> +	c->cputype = CPU_LOONGSON64;
> +
>  	/* All Loongson processors covered here define ExcCode 16 as GSExc. */
> +	decode_configs(c);
>  	c->options |= MIPS_CPU_GSEXCEX;

 This has misplaced the comment, which is not about `decode_configs' at 
all.  For consistency with other code it also seems like `decode_configs' 
would best be called as the first statement of `cpu_probe_loongson'.

  Maciej
diff mbox series

Patch

diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index e79adcb128e6..b406d8bfb15a 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -1677,7 +1677,10 @@  static inline void decode_cpucfg(struct cpuinfo_mips *c)
 
 static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
 {
+	c->cputype = CPU_LOONGSON64;
+
 	/* All Loongson processors covered here define ExcCode 16 as GSExc. */
+	decode_configs(c);
 	c->options |= MIPS_CPU_GSEXCEX;
 
 	switch (c->processor_id & PRID_IMP_MASK) {
@@ -1687,7 +1690,6 @@  static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
 		case PRID_REV_LOONGSON2K_R1_1:
 		case PRID_REV_LOONGSON2K_R1_2:
 		case PRID_REV_LOONGSON2K_R1_3:
-			c->cputype = CPU_LOONGSON64;
 			__cpu_name[cpu] = "Loongson-2K";
 			set_elf_platform(cpu, "gs264e");
 			set_isa(c, MIPS_CPU_ISA_M64R2);
@@ -1700,14 +1702,12 @@  static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
 		switch (c->processor_id & PRID_REV_MASK) {
 		case PRID_REV_LOONGSON3A_R2_0:
 		case PRID_REV_LOONGSON3A_R2_1:
-			c->cputype = CPU_LOONGSON64;
 			__cpu_name[cpu] = "ICT Loongson-3";
 			set_elf_platform(cpu, "loongson3a");
 			set_isa(c, MIPS_CPU_ISA_M64R2);
 			break;
 		case PRID_REV_LOONGSON3A_R3_0:
 		case PRID_REV_LOONGSON3A_R3_1:
-			c->cputype = CPU_LOONGSON64;
 			__cpu_name[cpu] = "ICT Loongson-3";
 			set_elf_platform(cpu, "loongson3a");
 			set_isa(c, MIPS_CPU_ISA_M64R2);
@@ -1727,7 +1727,6 @@  static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
 		c->ases &= ~MIPS_ASE_VZ; /* VZ of Loongson-3A2000/3000 is incomplete */
 		break;
 	case PRID_IMP_LOONGSON_64G:
-		c->cputype = CPU_LOONGSON64;
 		__cpu_name[cpu] = "ICT Loongson-3";
 		set_elf_platform(cpu, "loongson3a");
 		set_isa(c, MIPS_CPU_ISA_M64R2);
@@ -1737,8 +1736,6 @@  static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
 		panic("Unknown Loongson Processor ID!");
 		break;
 	}
-
-	decode_configs(c);
 }
 #else
 static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) { }