From patchwork Thu Aug 24 04:03:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiaxun Yang X-Patchwork-Id: 13363540 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BCF3BC3DA6F for ; Thu, 24 Aug 2023 04:05:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234534AbjHXEEc (ORCPT ); Thu, 24 Aug 2023 00:04:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52794 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240005AbjHXEEN (ORCPT ); Thu, 24 Aug 2023 00:04:13 -0400 Received: from out4-smtp.messagingengine.com (out4-smtp.messagingengine.com [66.111.4.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E688A198; Wed, 23 Aug 2023 21:04:10 -0700 (PDT) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id 7E2945C0200; Thu, 24 Aug 2023 00:04:07 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute1.internal (MEProxy); Thu, 24 Aug 2023 00:04:07 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=flygoat.com; h= cc:cc:content-transfer-encoding:content-type:date:date:from:from :in-reply-to:message-id:mime-version:reply-to:sender:subject :subject:to:to; s=fm2; t=1692849847; x=1692936247; bh=oP/gPV/pNQ wDfgV/Ig6aHbuxRRON8CXYuajJAziUPQI=; b=SbvuKrUatxQamdvBhIhMvJoT2R 3SYbZIPuU1PgsZvRY3OGvLEUWGiqcfOCGZ3TqvAzHxjsCqOidhSB1d/9tBXL4w04 kV13Ngg7xCVXKhYubdNKE7ESZFkFKYo2zp6mLqwcGG2D/8sAvbcjaHeLvYqO19RC jISfAvhrfuPpnu64pv/jR1gyzhqzLwWNy3/mPWM4Uzy34J9bYov/2vv6DEAEheVv +g+jVZis0CVesxzcadYfr7jzt57QfmH+q0CTwKQZLkHDhsw1+uRLtsTzjOxdFlAm vbLXw6CLQRqa0wMaagRv3KssS3Yk2jk2oDkVnRAR+ciOBn53Yhz7qhWi+wsg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:message-id:mime-version:reply-to:sender:subject :subject:to:to:x-me-proxy:x-me-proxy:x-me-sender:x-me-sender :x-sasl-enc; s=fm1; t=1692849847; x=1692936247; bh=oP/gPV/pNQwDf gV/Ig6aHbuxRRON8CXYuajJAziUPQI=; b=KU6/Gu7OOD6/jt4btnOHVOJiqFAf3 26g75eHbJp51xmKjj2H1ztNwB/wICeJv3H6dG6Qoitr+gQeJgpxcCH4pprqdmIQv DGq2SxlBwrZbnH9kw3JrzoA6/dtozRxy7tugS//CmjcLHa3P6yJd4/m6IJnkvsHq FUJRdlk4dYdvPivQA6/BtVSTpLg/mJVX9LPXdNHFsgsakr0BcxYOHm2ZvtPrPV7x j3onP4kqXzy5hhnGqN/EZmUg+TpDcw8w1NDtD/e44cxp6ubI6hHUTTwdbkG5k8Vc u8G2a1I0Tp7Th+LGvkoPJSW/+2jlNtGT4MqIJXem/igsIeVyqy/8CZNgA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedviedruddvhedgjeejucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgggfestdekredtredttdenucfhrhhomheplfhirgiguhhn ucgjrghnghcuoehjihgrgihunhdrhigrnhhgsehflhihghhorghtrdgtohhmqeenucggtf frrghtthgvrhhnpefhtedutdduveeileejjeetffehueejudehgfffjeduhfeuleeludff fefgffevkeenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhroh hmpehjihgrgihunhdrhigrnhhgsehflhihghhorghtrdgtohhm X-ME-Proxy: Feedback-ID: ifd894703:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 24 Aug 2023 00:04:04 -0400 (EDT) From: Jiaxun Yang To: linux-mips@vger.kernel.org Cc: Jiaxun Yang , Baoquan He , Thomas Bogendoerfer , Huacai Chen , Arnd Bergmann , linux-arch@vger.kernel.org Subject: [PATCH v5] mips: add including Date: Thu, 24 Aug 2023 12:03:29 +0800 Message-Id: <20230824040329.132810-1-jiaxun.yang@flygoat.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mips@vger.kernel.org With the adding, some default ioremap_xx methods defined in asm-generic/io.h can be used. E.g the default ioremap_uc() returning NULL. We also massaged various headers to avoid nested includes. Signed-off-by: Baoquan He Signed-off-by: Jiaxun Yang [jiaxun.yang@flygoat.com: Massage more headers, fix ioport defines] Cc: Thomas Bogendoerfer Cc: Huacai Chen Cc: Jiaxun Yang Cc: Arnd Bergmann Cc: linux-mips@vger.kernel.org Cc: linux-arch@vger.kernel.org Reviewed-by: Arnd Bergmann --- v5: - Remove unused define of memcpy_* - Don't define 64bit variant of I/O ops on 32bit kernel --- arch/mips/include/asm/io.h | 96 +++++++++++++++++++++++---------- arch/mips/include/asm/mmiowb.h | 4 +- arch/mips/include/asm/smp-ops.h | 2 - arch/mips/include/asm/smp.h | 4 +- arch/mips/kernel/setup.c | 1 + arch/mips/pci/pci-ip27.c | 3 ++ 6 files changed, 75 insertions(+), 35 deletions(-) diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 062dd4e6b954..41d8bd5adef8 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -13,7 +13,6 @@ #define _ASM_IO_H #include -#include #include #include @@ -25,7 +24,6 @@ #include #include #include -#include #include #include @@ -41,6 +39,11 @@ # define __raw_ioswabq(a, x) (x) # define ____raw_ioswabq(a, x) (x) +# define _ioswabb ioswabb +# define _ioswabw ioswabw +# define _ioswabl ioswabl +# define _ioswabq ioswabq + # define __relaxed_ioswabb ioswabb # define __relaxed_ioswabw ioswabw # define __relaxed_ioswabl ioswabl @@ -126,6 +129,7 @@ static inline phys_addr_t virt_to_phys(const volatile void *x) * almost all conceivable cases a device driver should not be using * this function */ +#define phys_to_virt phys_to_virt static inline void * phys_to_virt(unsigned long address) { return __va(address); @@ -296,9 +300,9 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \ return pfx##ioswab##bwlq(__mem, __val); \ } -#define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, barrier, relax, p) \ +#define __BUILD_IOPORT_SINGLE(pfx, bwlq, type, barrier, relax) \ \ -static inline void pfx##out##bwlq##p(type val, unsigned long port) \ +static inline void pfx##out##bwlq(type val, unsigned long port) \ { \ volatile type *__addr; \ type __val; \ @@ -318,7 +322,7 @@ static inline void pfx##out##bwlq##p(type val, unsigned long port) \ *__addr = __val; \ } \ \ -static inline type pfx##in##bwlq##p(unsigned long port) \ +static inline type pfx##in##bwlq(unsigned long port) \ { \ volatile type *__addr; \ type __val; \ @@ -360,11 +364,10 @@ __BUILD_MEMORY_PFX(__mem_, q, u64, 0) #endif #define __BUILD_IOPORT_PFX(bus, bwlq, type) \ - __BUILD_IOPORT_SINGLE(bus, bwlq, type, 1, 0,) \ - __BUILD_IOPORT_SINGLE(bus, bwlq, type, 1, 0, _p) + __BUILD_IOPORT_SINGLE(bus, bwlq, type, 1, 0) #define BUILDIO_IOPORT(bwlq, type) \ - __BUILD_IOPORT_PFX(, bwlq, type) \ + __BUILD_IOPORT_PFX(_, bwlq, type) \ __BUILD_IOPORT_PFX(__mem_, bwlq, type) BUILDIO_IOPORT(b, u8) @@ -412,14 +415,6 @@ __BUILDIO(q, u64) #define writeq_be(val, addr) \ __raw_writeq(cpu_to_be64((val)), (__force unsigned *)(addr)) -/* - * Some code tests for these symbols - */ -#ifdef CONFIG_64BIT -#define readq readq -#define writeq writeq -#endif - #define __BUILD_MEMORY_STRING(bwlq, type) \ \ static inline void writes##bwlq(volatile void __iomem *mem, \ @@ -480,18 +475,6 @@ BUILDSTRING(l, u32) BUILDSTRING(q, u64) #endif -static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count) -{ - memset((void __force *) addr, val, count); -} -static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count) -{ - memcpy(dst, (void __force *) src, count); -} -static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count) -{ - memcpy((void __force *) dst, src, count); -} /* * The caches on some architectures aren't dma-coherent and have need to @@ -548,6 +531,61 @@ extern void (*_dma_cache_inv)(unsigned long start, unsigned long size); #define csr_out32(v, a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST) = (v)) #define csr_in32(a) (*(volatile u32 *)((unsigned long)(a) + __CSR_32_ADJUST)) + +#define __raw_readb __raw_readb +#define __raw_readw __raw_readw +#define __raw_readl __raw_readl +#ifdef CONFIG_64BIT +#define __raw_readq __raw_readq +#endif +#define __raw_writeb __raw_writeb +#define __raw_writew __raw_writew +#define __raw_writel __raw_writel +#ifdef CONFIG_64BIT +#define __raw_writeq __raw_writeq +#endif + +#define readb readb +#define readw readw +#define readl readl +#ifdef CONFIG_64BIT +#define readq readq +#endif +#define writeb writeb +#define writew writew +#define writel writel +#ifdef CONFIG_64BIT +#define writeq writeq +#endif + +#define readsb readsb +#define readsw readsw +#define readsl readsl +#ifdef CONFIG_64BIT +#define readsq readsq +#endif +#define writesb writesb +#define writesw writesw +#define writesl writesl +#ifdef CONFIG_64BIT +#define writesq writesq +#endif + +#define _inb _inb +#define _inw _inw +#define _inl _inl +#define insb insb +#define insw insw +#define insl insl + +#define _outb _outb +#define _outw _outw +#define _outl _outl +#define outsb outsb +#define outsw outsw +#define outsl outsl + + /* * Convert a physical pointer to a virtual kernel pointer for /dev/mem * access @@ -557,4 +595,6 @@ extern void (*_dma_cache_inv)(unsigned long start, unsigned long size); void __ioread64_copy(void *to, const void __iomem *from, size_t count); +#include + #endif /* _ASM_IO_H */ diff --git a/arch/mips/include/asm/mmiowb.h b/arch/mips/include/asm/mmiowb.h index a40824e3ef8e..cf27752fd220 100644 --- a/arch/mips/include/asm/mmiowb.h +++ b/arch/mips/include/asm/mmiowb.h @@ -2,9 +2,9 @@ #ifndef _ASM_MMIOWB_H #define _ASM_MMIOWB_H -#include +#include -#define mmiowb() iobarrier_w() +#define mmiowb() wmb() #include diff --git a/arch/mips/include/asm/smp-ops.h b/arch/mips/include/asm/smp-ops.h index 5719ff49eff1..a6941b7f0cc0 100644 --- a/arch/mips/include/asm/smp-ops.h +++ b/arch/mips/include/asm/smp-ops.h @@ -13,8 +13,6 @@ #include -#include - #ifdef CONFIG_SMP #include diff --git a/arch/mips/include/asm/smp.h b/arch/mips/include/asm/smp.h index a40d8c0e4b87..f3b18b4a5e44 100644 --- a/arch/mips/include/asm/smp.h +++ b/arch/mips/include/asm/smp.h @@ -11,13 +11,11 @@ #ifndef __ASM_SMP_H #define __ASM_SMP_H -#include +#include #include -#include #include #include -#include #include extern int smp_num_siblings; diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index cb871eb784a7..6939b27b1106 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -43,6 +43,7 @@ #include #include #include +#include #include #include diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c index d85cbf84e41c..973faea61cad 100644 --- a/arch/mips/pci/pci-ip27.c +++ b/arch/mips/pci/pci-ip27.c @@ -7,6 +7,9 @@ * Copyright (C) 1999, 2000, 04 Ralf Baechle (ralf@linux-mips.org) * Copyright (C) 1999, 2000 Silicon Graphics, Inc. */ + +#include + #include #include #include