diff mbox series

[v3,12/22] MIPS: Get rid of CONFIG_NO_EXCEPT_FILL

Message ID 20231201111512.803120-13-gregory.clement@bootlin.com (mailing list archive)
State Superseded
Headers show
Series Add support for the Mobileye EyeQ5 SoC | expand

Commit Message

Gregory CLEMENT Dec. 1, 2023, 11:14 a.m. UTC 
From: Jiaxun Yang <jiaxun.yang@flygoat.com>

NO_EXCEPT_FILL is used to indicate platform that does not
need to reserve ebase memory at start of kernel.

This is true for all R2+ platform as they allocate ebase
memory on fly, and also true for any platform that does
not load kernel at start of physical memory.

Get rid this Kconfig symbol by use macro to detect conditions
above.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
 arch/mips/Kconfig       | 8 --------
 arch/mips/kernel/head.S | 7 +++++--
 2 files changed, 5 insertions(+), 10 deletions(-)

Comments

kernel test robot Dec. 6, 2023, 12:40 a.m. UTC | #1 
Hi Gregory,

kernel test robot noticed the following build warnings:

[auto build test WARNING on robh/for-next]
[also build test WARNING on lee-mfd/for-mfd-next linus/master v6.7-rc4]
[cannot apply to lee-mfd/for-mfd-fixes next-20231205]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Gregory-CLEMENT/MIPS-Export-higher-highest-relocation-functions-in-uasm/20231201-201547
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link:    https://lore.kernel.org/r/20231201111512.803120-13-gregory.clement%40bootlin.com
patch subject: [PATCH v3 12/22] MIPS: Get rid of CONFIG_NO_EXCEPT_FILL
config: mips-fuloong2e_defconfig (https://download.01.org/0day-ci/archive/20231206/202312060831.fGiw8m5S-lkp@intel.com/config)
compiler: mips64el-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231206/202312060831.fGiw8m5S-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202312060831.fGiw8m5S-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> arch/mips/kernel/head.S:63:35: warning: "KSEG0" is not defined, evaluates to 0 [-Wundef]
      63 |         ((VMLINUX_LOAD_ADDRESS == KSEG0) ||     \
         |                                   ^~~~~


vim +/KSEG0 +63 arch/mips/kernel/head.S

    28	
    29		/*
    30		 * For the moment disable interrupts, mark the kernel mode and
    31		 * set ST0_KX so that the CPU does not spit fire when using
    32		 * 64-bit addresses.  A full initialization of the CPU's status
    33		 * register is done later in per_cpu_trap_init().
    34		 */
    35		.macro	setup_c0_status set clr
    36		.set	push
    37		mfc0	t0, CP0_STATUS
    38		or	t0, ST0_KERNEL_CUMASK|\set|0x1f|\clr
    39		xor	t0, 0x1f|\clr
    40		mtc0	t0, CP0_STATUS
    41		.set	noreorder
    42		sll	zero,3				# ehb
    43		.set	pop
    44		.endm
    45	
    46		.macro	setup_c0_status_pri
    47	#ifdef CONFIG_64BIT
    48		setup_c0_status ST0_KX 0
    49	#else
    50		setup_c0_status 0 0
    51	#endif
    52		.endm
    53	
    54		.macro	setup_c0_status_sec
    55	#ifdef CONFIG_64BIT
    56		setup_c0_status ST0_KX ST0_BEV
    57	#else
    58		setup_c0_status 0 ST0_BEV
    59	#endif
    60		.endm
    61	
    62	#if (MIPS_ISA_REV < 2) &&			\
  > 63		((VMLINUX_LOAD_ADDRESS == KSEG0) ||	\
    64		(VMLINUX_LOAD_ADDRESS == CKSEG0))
    65		/*
    66		 * Reserved space for exception handlers.
    67		 * Necessary for machines which link their kernels at KSEG0
    68		 * and incapable of moving ebase.
    69		 */
    70		.fill	0x400
    71	#endif
    72
diff mbox series

Patch

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 11bacbd3971f6..88965b8f8fcc4 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -150,7 +150,6 @@  config MIPS_GENERIC_KERNEL
 	select MIPS_CPU_SCACHE
 	select MIPS_GIC
 	select MIPS_L1_CACHE_SHIFT_7
-	select NO_EXCEPT_FILL
 	select PCI_DRIVERS_GENERIC
 	select SMP_UP if SMP
 	select SWAP_IO_SPACE
@@ -244,7 +243,6 @@  config BMIPS_GENERIC
 	select ARCH_HAS_RESET_CONTROLLER
 	select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
 	select BOOT_RAW
-	select NO_EXCEPT_FILL
 	select USE_OF
 	select CEVT_R4K
 	select CSRC_R4K
@@ -288,7 +286,6 @@  config BCM47XX
 	select HAVE_PCI
 	select IRQ_MIPS_CPU
 	select SYS_HAS_CPU_MIPS32_R1
-	select NO_EXCEPT_FILL
 	select SYS_SUPPORTS_32BIT_KERNEL
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 	select SYS_SUPPORTS_MIPS16
@@ -424,7 +421,6 @@  config LANTIQ
 	select IRQ_MIPS_CPU
 	select CEVT_R4K
 	select CSRC_R4K
-	select NO_EXCEPT_FILL
 	select SYS_HAS_CPU_MIPS32_R1
 	select SYS_HAS_CPU_MIPS32_R2
 	select SYS_SUPPORTS_BIG_ENDIAN
@@ -473,7 +469,6 @@  config MACH_LOONGSON64
 	select ISA
 	select I8259
 	select IRQ_MIPS_CPU
-	select NO_EXCEPT_FILL
 	select NR_CPUS_DEFAULT_64
 	select USE_GENERIC_EARLY_PRINTK_8250
 	select PCI_DRIVERS_GENERIC
@@ -1156,9 +1151,6 @@  config PCI_GT64XXX_PCI0
 config PCI_XTALK_BRIDGE
 	bool
 
-config NO_EXCEPT_FILL
-	bool
-
 config MIPS_SPRAM
 	bool
 
diff --git a/arch/mips/kernel/head.S b/arch/mips/kernel/head.S
index b825ed4476c70..4af53b1628f57 100644
--- a/arch/mips/kernel/head.S
+++ b/arch/mips/kernel/head.S
@@ -59,10 +59,13 @@ 
 #endif
 	.endm
 
-#ifndef CONFIG_NO_EXCEPT_FILL
+#if (MIPS_ISA_REV < 2) &&			\
+	((VMLINUX_LOAD_ADDRESS == KSEG0) ||	\
+	(VMLINUX_LOAD_ADDRESS == CKSEG0))
 	/*
 	 * Reserved space for exception handlers.
-	 * Necessary for machines which link their kernels at KSEG0.
+	 * Necessary for machines which link their kernels at KSEG0
+	 * and incapable of moving ebase.
 	 */
 	.fill	0x400
 #endif