From patchwork Mon Dec 11 18:58:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13487969 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Nn0voCmG" Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7BBE9CF; Mon, 11 Dec 2023 11:03:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1702321420; x=1733857420; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jT5aMdLnWQi+FETkAhi9wCFmGc0jKKEFEHjIqYKnUWw=; b=Nn0voCmGPJDA6IHhoxweSVvkDnFsTplswe3WMvdYStBVtaxT7KK8PcRn hUsRNyK6icv2qm2rd4bVoxaYCX9KQa+edS4KbYQtoW9+17mONRe2yOxwV jKP7EBi0YpVYFYl+vK1mbYBFLuUxCSyL0oNJ+NxAbcM+S86ZxVVsO9aTp dkPBZrOC1oU8HgM0Gdg7TntCHYuSVDewBd5HBkh6t4d7Tssl0ba9l673I EpFaW9A6lhbOdIKaN3gmsln0D7aEWRHqJ1Kvw0CFvvxcFxW57fD8Mfiu0 izVzqnt2UQOVkqkGU4/lJWFVNxLpD0klyLd7HpjUFtbFfW1S0ygoxJHmi g==; X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="480893504" X-IronPort-AV: E=Sophos;i="6.04,268,1695711600"; d="scan'208";a="480893504" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Dec 2023 11:03:39 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10921"; a="766491687" X-IronPort-AV: E=Sophos;i="6.04,268,1695711600"; d="scan'208";a="766491687" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 11 Dec 2023 11:03:32 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id BB59872F; Mon, 11 Dec 2023 21:03:23 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Geert Uytterhoeven , Rasmus Villemoes , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-mips@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , Paul Cercueil , Lakshmi Sowjanya D , Emil Renner Berthing , Hal Feng Subject: [PATCH v5 08/13] pinctrl: ingenic: Convert to use grp member Date: Mon, 11 Dec 2023 20:58:01 +0200 Message-ID: <20231211190321.307330-9-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231211190321.307330-1-andriy.shevchenko@linux.intel.com> References: <20231211190321.307330-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert drivers to use grp member embedded in struct group_desc, because other members will be removed to avoid duplication and desynchronisation of the generic pin group description. Acked-by: Paul Cercueil Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-ingenic.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-) diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c index f5661dcdedf5..bc6358a686fc 100644 --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c @@ -84,17 +84,13 @@ #define INGENIC_PIN_GROUP_FUNCS(_name_, id, funcs) \ { \ - .name = _name_, \ - .pins = id##_pins, \ - .num_pins = ARRAY_SIZE(id##_pins), \ + .grp = PINCTRL_PINGROUP(_name_, id##_pins, ARRAY_SIZE(id##_pins)), \ .data = funcs, \ } #define INGENIC_PIN_GROUP(_name_, id, func) \ { \ - .name = _name_, \ - .pins = id##_pins, \ - .num_pins = ARRAY_SIZE(id##_pins), \ + .grp = PINCTRL_PINGROUP(_name_, id##_pins, ARRAY_SIZE(id##_pins)), \ .data = (void *)func, \ } @@ -3766,17 +3762,17 @@ static int ingenic_pinmux_set_mux(struct pinctrl_dev *pctldev, return -EINVAL; dev_dbg(pctldev->dev, "enable function %s group %s\n", - func->name, grp->name); + func->name, grp->grp.name); mode = (uintptr_t)grp->data; if (mode <= 3) { - for (i = 0; i < grp->num_pins; i++) - ingenic_pinmux_set_pin_fn(jzpc, grp->pins[i], mode); + for (i = 0; i < grp->grp.npins; i++) + ingenic_pinmux_set_pin_fn(jzpc, grp->grp.pins[i], mode); } else { pin_modes = grp->data; - for (i = 0; i < grp->num_pins; i++) - ingenic_pinmux_set_pin_fn(jzpc, grp->pins[i], pin_modes[i]); + for (i = 0; i < grp->grp.npins; i++) + ingenic_pinmux_set_pin_fn(jzpc, grp->grp.pins[i], pin_modes[i]); } return 0; @@ -4303,12 +4299,12 @@ static int __init ingenic_pinctrl_probe(struct platform_device *pdev) for (i = 0; i < chip_info->num_groups; i++) { const struct group_desc *group = &chip_info->groups[i]; + const struct pingroup *grp = &group->grp; - err = pinctrl_generic_add_group(jzpc->pctl, group->name, - group->pins, group->num_pins, group->data); + err = pinctrl_generic_add_group(jzpc->pctl, grp->name, grp->pins, grp->npins, + group->data); if (err < 0) { - dev_err(dev, "Failed to register group %s\n", - group->name); + dev_err(dev, "Failed to register group %s\n", grp->name); return err; } }