From patchwork Mon Feb 26 14:19:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13572248 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F39F71C6B9; Mon, 26 Feb 2024 14:25:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.16 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708957526; cv=none; b=rTBiTuBBPcHUI88nk6n5eEWqGlLxQfp/wPuu9p2PNNRSy30In8rnTCs3bMIF2qi66vL9bcLf35t+dbHgR93OoQ+SWEXvZ5murN7pxdzCqogmsy59ib98b95okMC+LmQyEwV1HdO9W/oelwPw6otWOxc2ltC6p7shDuXPfppn0Ms= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708957526; c=relaxed/simple; bh=B//5uMMN9W3FfA5/QrjFTADRm2s5rP7KhGSGOFjNn5k=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Hb/2Mtu+qVZ7VD/9XQJHw5/hc4jWM8QG7xwi9XFiekGOP/kOEQ2uWdMtBNzW3Suo4RB4x5gMWd8hD6rhdYlxq7BDf/XCC5yjEpx6gVj2/jh9YYY2iTh90kisqtwj3+YvJU6r0owHxsGYLKs5TRaNNmDzLul1RTkl6VwkloU+n+M= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=km0dIvkB; arc=none smtp.client-ip=198.175.65.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="km0dIvkB" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1708957524; x=1740493524; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=B//5uMMN9W3FfA5/QrjFTADRm2s5rP7KhGSGOFjNn5k=; b=km0dIvkBScYqdH6goBFC61aeZ1+qt+bkvVzTrqxzyRycg79H1MLfDiA6 DfciMgT5kaxl/0nE6HxNgkrX4halm/xjofe/6FpurhbTMiMSgNm9JLIiP U2rUvjq8vVcrlqsaJSixdYBoFbffMqT/XW5tR8qjN9Ke+ibCtAdc65iWz qQwvrbZd2RU8MlH/D+2TY9vtY3IdN3LMStmPW5cZUhRmaSwGkLBzFaO6/ ZvEKjDeqPq6EEMmh2g0DqpD7o5NquG0KrX7wsITPcXfgGTxSIbmTaSlsN Ndz3dwBwpcmJFURmF5UGb/SANTXchTrbdpt7r6osbaENIlZnLl0i0OqeY w==; X-IronPort-AV: E=McAfee;i="6600,9927,10995"; a="3375090" X-IronPort-AV: E=Sophos;i="6.06,185,1705392000"; d="scan'208";a="3375090" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Feb 2024 06:25:23 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10995"; a="937030137" X-IronPort-AV: E=Sophos;i="6.06,185,1705392000"; d="scan'208";a="937030137" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 26 Feb 2024 06:25:17 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 26743445; Mon, 26 Feb 2024 16:25:16 +0200 (EET) From: Andy Shevchenko To: Greg Kroah-Hartman , Andy Shevchenko , Thomas Gleixner , linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-rpi-kernel@lists.infradead.org, linux-mips@vger.kernel.org, linux-tegra@vger.kernel.org Cc: Jiri Slaby , Joel Stanley , Andrew Jeffery , Florian Fainelli , Broadcom internal kernel review list , Ray Jui , Scott Branden , Al Cooper , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Paul Cercueil , Vladimir Zapolskiy , Thierry Reding , Jonathan Hunter , Kunihiko Hayashi , Masami Hiramatsu Subject: [PATCH v2 03/14] serial: port: Introduce a common helper to read properties Date: Mon, 26 Feb 2024 16:19:19 +0200 Message-ID: <20240226142514.1485246-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20240226142514.1485246-1-andriy.shevchenko@linux.intel.com> References: <20240226142514.1485246-1-andriy.shevchenko@linux.intel.com> Precedence: bulk X-Mailing-List: linux-mips@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Several serial drivers want to read the same or similar set of the port properties. Make a common helper for them. Signed-off-by: Andy Shevchenko --- drivers/tty/serial/serial_port.c | 134 +++++++++++++++++++++++++++++++ include/linux/serial_core.h | 1 + 2 files changed, 135 insertions(+) diff --git a/drivers/tty/serial/serial_port.c b/drivers/tty/serial/serial_port.c index 88975a4df306..ecc980e9dba6 100644 --- a/drivers/tty/serial/serial_port.c +++ b/drivers/tty/serial/serial_port.c @@ -8,7 +8,10 @@ #include #include +#include +#include #include +#include #include #include @@ -82,6 +85,137 @@ void uart_remove_one_port(struct uart_driver *drv, struct uart_port *port) } EXPORT_SYMBOL(uart_remove_one_port); +/** + * uart_read_port_properties - read firmware properties of the given UART port + * @port: corresponding port + * @use_defaults: apply defaults (when %true) or validate the values (when %false) + * + * The following device properties are supported: + * - clock-frequency (optional) + * - fifo-size (optional) + * - no-loopback-test (optional) + * - reg-shift (defaults may apply) + * - reg-offset (value may be validated) + * - reg-io-width (defaults may apply or value may be validated) + * - interrupts (OF only) + * - serial [alias ID] (OF only) + * + * If the port->dev is of struct platform_device type the interrupt line + * will be retrieved via platform_get_irq() call against that device. + * Otherwise it will be assigned by fwnode_irq_get() call. In both cases + * the index 0 of the resource is used. + * + * The caller is responsible to initialize the following fields of the @port + * ->dev (must be valid) + * ->flags + * ->mapbase + * ->mapsize + * ->regshift (if @use_defaults is false) + * before calling this function. Alternatively the above mentioned fields + * may be zeroed, in such case the only ones, that have associated properties + * found, will be set to the respective values. + * + * If no error happened, the ->irq, ->mapbase, ->mapsize will be altered. + * The ->iotype is always altered. + * + * When @use_defaults is true and the respective property is not found + * the following values will be applied: + * ->regshift = 0 + * In this case IRQ must be provided, otherwise an error will be returned. + * + * When @use_defaults is false and the respective property is found + * the following values will be validated: + * - reg-io-width (->iotype) + * - reg-offset (->mapsize against ->mapbase) + * + * Returns: 0 on success or negative errno on failure + */ +int uart_read_port_properties(struct uart_port *port, bool use_defaults) +{ + struct device *dev = port->dev; + u32 value; + int ret; + + /* Read optional UART functional clock frequency */ + device_property_read_u32(dev, "clock-frequency", &port->uartclk); + + /* Read the registers alignment (default: 8-bit) */ + ret = device_property_read_u32(dev, "reg-shift", &value); + if (ret) + port->regshift = use_defaults ? 0 : port->regshift; + else + port->regshift = value; + + /* Read the registers I/O access type (default: MMIO 8-bit) */ + ret = device_property_read_u32(dev, "reg-io-width", &value); + if (ret) { + port->iotype = UPIO_MEM; + } else { + switch (value) { + case 1: + port->iotype = UPIO_MEM; + break; + case 2: + port->iotype = UPIO_MEM16; + break; + case 4: + port->iotype = device_is_big_endian(dev) ? UPIO_MEM32BE : UPIO_MEM32; + break; + default: + if (!use_defaults) { + dev_err(dev, "Unsupported reg-io-width (%u)\n", value); + return -EINVAL; + } + port->iotype = UPIO_UNKNOWN; + break; + } + } + + /* Read the address mapping base offset (default: no offset) */ + ret = device_property_read_u32(dev, "reg-offset", &value); + if (ret) + value = 0; + + /* Check for shifted address mapping overflow */ + if (!use_defaults && port->mapsize < value) { + dev_err(dev, "reg-offset %u exceeds region size %pa\n", value, &port->mapsize); + return -EINVAL; + } + + port->mapbase += value; + port->mapsize -= value; + + /* Read optional FIFO size */ + device_property_read_u32(dev, "fifo-size", &port->fifosize); + + if (device_property_read_bool(dev, "no-loopback-test")) + port->flags |= UPF_SKIP_TEST; + + /* Get index of serial line, if found in DT aliases */ + ret = of_alias_get_id(dev_of_node(dev), "serial"); + if (ret >= 0) + port->line = ret; + + if (dev_is_platform(dev)) + ret = platform_get_irq(to_platform_device(dev), 0); + else + ret = fwnode_irq_get(dev_fwnode(dev), 0); + if (ret == -EPROBE_DEFER) + return ret; + if (ret > 0) + port->irq = ret; + else if (use_defaults) + /* By default IRQ support is mandatory */ + return ret; + else + port->irq = 0; + + port->flags |= UPF_SHARE_IRQ; + + return 0; +} +EXPORT_SYMBOL(uart_read_port_properties); + static struct device_driver serial_port_driver = { .name = "port", .suppress_bind_attrs = true, diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index c2cf9484014c..3fc8683e7b53 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h @@ -962,6 +962,7 @@ int uart_register_driver(struct uart_driver *uart); void uart_unregister_driver(struct uart_driver *uart); int uart_add_one_port(struct uart_driver *reg, struct uart_port *port); void uart_remove_one_port(struct uart_driver *reg, struct uart_port *port); +int uart_read_port_properties(struct uart_port *port, bool use_defaults); bool uart_match_port(const struct uart_port *port1, const struct uart_port *port2);