Message ID | 20240430-loongson1-nand-v7-2-60787c314fa4@gmail.com (mailing list archive) |
---|---|
State | Handled Elsewhere |
Headers | show |
Series | Add support for Loongson-1 NAND | expand |
Hi, devnull+keguang.zhang.gmail.com@kernel.org wrote on Tue, 30 Apr 2024 19:11:11 +0800: > From: Keguang Zhang <keguang.zhang@gmail.com> > > nand_read_subpage() reads data and ECC data by two separate > operations. > This patch allows the NAND controllers who support > monolithic page read to do subpage read by a single operation, > which is more effective than nand_read_subpage(). I am a bit puzzled by this change. Usually nand_read_subpage is used for optimizations (when less data than a full page must be retrieved). I know it may be used in other cases (because it's easier for the core in order to support a wide range of controllers). Can you please show a speed test showing the results before I consider merging this patch? The monolithic thing was not supposed to improve throughput but to help with very limited controllers. Thanks, Miquèl
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index d7dbbd469b89..eeb654c6b4fc 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -3630,7 +3630,7 @@ static int nand_do_read_ops(struct nand_chip *chip, loff_t from, oob_required, page); else if (!aligned && NAND_HAS_SUBPAGE_READ(chip) && - !oob) + !NAND_HAS_MONOLITHIC_READ(chip) && !oob) ret = chip->ecc.read_subpage(chip, col, bytes, bufpoi, page); else @@ -3648,7 +3648,8 @@ static int nand_do_read_ops(struct nand_chip *chip, loff_t from, * partial pages or when a bounce buffer is required. */ if (use_bounce_buf) { - if (!NAND_HAS_SUBPAGE_READ(chip) && !oob && + if ((!NAND_HAS_SUBPAGE_READ(chip) || + NAND_HAS_MONOLITHIC_READ(chip)) && !oob && !(mtd->ecc_stats.failed - ecc_stats.failed) && (ops->mode != MTD_OPS_RAW)) { chip->pagecache.page = realpage; diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index e84522e31301..92d3ab491c9c 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -150,6 +150,11 @@ struct gpio_desc; /* Device needs 3rd row address cycle */ #define NAND_ROW_ADDR_3 BIT(14) +/* Device supports monolithic reads */ +#define NAND_MONOLITHIC_READ BIT(15) +/* Macros to identify the above */ +#define NAND_HAS_MONOLITHIC_READ(chip) ((chip->options & NAND_MONOLITHIC_READ)) + /* Non chip related options */ /* This option skips the bbt scan during initialization. */ #define NAND_SKIP_BBTSCAN BIT(16)